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Diffstat (limited to 'testsuite/vests/vhdl-ams/ashenden/compliant/composite-data/inline_17a.vhd')
-rw-r--r-- | testsuite/vests/vhdl-ams/ashenden/compliant/composite-data/inline_17a.vhd | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-ams/ashenden/compliant/composite-data/inline_17a.vhd b/testsuite/vests/vhdl-ams/ashenden/compliant/composite-data/inline_17a.vhd new file mode 100644 index 000000000..a3f4a69e3 --- /dev/null +++ b/testsuite/vests/vhdl-ams/ashenden/compliant/composite-data/inline_17a.vhd @@ -0,0 +1,46 @@ + +-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc + +-- This file is part of VESTs (Vhdl tESTs). + +-- VESTs is free software; you can redistribute it and/or modify it +-- under the terms of the GNU General Public License as published by the +-- Free Software Foundation; either version 2 of the License, or (at +-- your option) any later version. + +-- VESTs is distributed in the hope that it will be useful, but WITHOUT +-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +entity inline_17a is + +end entity inline_17a; + + +---------------------------------------------------------------- + + +library ieee_proposed; use ieee_proposed.electrical_systems.all; + +architecture test of inline_17a is + + -- code from book: + + nature electrical_bus is record + strobe : electrical; + bus_lines : electrical_vector(0 to 15); + end record electrical_bus; + + terminal address_bus, data_bus : electrical_bus; + + quantity data_voltages across data_currents through data_bus; + + -- end of code from book + +begin +end architecture test; |