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* testsuite/gna: add a test for previous commit.Tristan Gingold2020-10-072-0/+8
* vhdl-sem_decls: avoid a crash after a parse error.Tristan Gingold2020-10-071-4/+11
* Synth doc: add infos about synth specific options, related to 667ab51tmeissner2020-10-071-0/+44
* doc/PSL: only clocked directives are supported, related to #1479 (#1487)T. Meissner2020-10-061-2/+2
* ci: add ubuntu-20.04 job and push nightly artifactumarcor2020-10-031-8/+11
* testsuite/gna: add a test for #1473Tristan Gingold2020-09-292-0/+27
* vhdl-sem_types: improve error handling on index subtypes. Fix #1473Tristan Gingold2020-09-291-3/+7
* testsuite/synth: add a test for #1481Tristan Gingold2020-09-282-0/+21
* netlists-disp_vhdl: handle null vectors for reducation operators.Tristan Gingold2020-09-281-3/+12
* testsuite/gna: add a test for #1480Tristan Gingold2020-09-283-0/+26
* vhdl-sem_psl: fix crash in case of error in assert statement. Fix #1480Tristan Gingold2020-09-281-2/+5
* vhdl-canon: canon generic associations for subprogram instantiations.Tristan Gingold2020-09-281-1/+6
* doc: clarify position of option --std. Fix #1477Tristan Gingold2020-09-281-0/+3
* vhdl-sem_expr: evaluate operands only if the operator result is not static.Tristan Gingold2020-09-281-5/+13
* vhdl-evaluation: minor rewrite.Tristan Gingold2020-09-281-5/+5
* testsuite/synth: adjust harness for #1475Tristan Gingold2020-09-281-1/+1
* synth_subtype_conversion: check overflow for discrete types.Tristan Gingold2020-09-281-24/+31
* py: run blackeine2020-09-262-723/+445
* testsuite/synth: add a case for #1475Tristan Gingold2020-09-264-0/+48
* vhdl: evaluate operands of operators, check bounds. For #1475Tristan Gingold2020-09-262-14/+30
* synth: minor refactoring. Move In_Bounds/In_Range to synth-objtypes.Tristan Gingold2020-09-265-21/+23
* vhdl: analyze subprogram instantiations. WIP. For #1470Tristan Gingold2020-09-2611-217/+390
* pnodes.py: fix a typoTristan Gingold2020-09-241-1/+1
* vhdl: parse subprogram instantiations. For #1470Tristan Gingold2020-09-2411-1397/+1902
* doc: add gnatdoc HTML outputumarcor2020-09-222-3/+15
* testsuite/gna: add a test for #1469Tristan Gingold2020-09-213-0/+44
* vhdl-sem_types: fix staticness of 'open' array constraint. Fix #1469Tristan Gingold2020-09-211-0/+1
* ghdldrv: adjust style and some error messages.Tristan Gingold2020-09-207-141/+99
* testsuite: print help after the versionumarcor2020-09-201-2/+7
* cli: rework syntax, add commands without '-' or '--'umarcor2020-09-209-136/+353
* testsuite/synth: Add a test. Close #1460Tristan Gingold2020-09-202-0/+28
* synth-disp_vhdl: extend vector conversions (for any range). For #1460Tristan Gingold2020-09-201-2/+20
* synth-expr: refine is_positive for wires. For #1460Tristan Gingold2020-09-201-2/+6
* synth: handle static resize. For #1460Tristan Gingold2020-09-203-0/+36
* testsuite/synth: add tests for find_leftmost/find_rightmost.Tristan Gingold2020-09-1912-0/+241
* synth: handle find_leftmost/find_rigthmost. For #1460Tristan Gingold2020-09-191-0/+77
* vhdl: recognize find_leftmost/find_rightmost. For #1460Tristan Gingold2020-09-165-183/+225
* py: add 'show_ports.py' to testsuite/python/units01umarcor2020-09-164-8/+125
* py: format testsuite/python/units01/show_units.pyumarcor2020-09-161-8/+12
* py: run blackeine2020-09-152-4/+2
* termux: use setup-pathforgcc and clang++umarcor2020-09-151-4/+3
* vhdl: recognize reduce operations from numeric_std.Tristan Gingold2020-09-145-252/+359
* synth: improve support of interface package. For #1460Tristan Gingold2020-09-133-66/+105
* termux: ln gnatmake-10umarcor2020-09-121-0/+3
* termux: update gnat, install llvm and make explicitlyumarcor2020-09-121-2/+2
* testsuite/gna: add a testcase for #1461Tristan Gingold2020-09-123-1/+28
* vhdl: allow conflict design unit name with -frelaxedTristan Gingold2020-09-122-17/+43
* sem_parenthesis_name: handle more error cases.Tristan Gingold2020-09-061-1/+5
* testsuite/gna: add a reproducer for #1456Tristan Gingold2020-09-062-0/+19
* vhdl: sem_parenthesis_name: do not crash on any type attribute. Fix #1456Tristan Gingold2020-09-061-18/+19
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