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* testsuite/gna: add a test for #1717Tristan Gingold2021-04-112-0/+60
* vhdl-sem_names.adb: fix check for object prefix of subtype attribute. Fix #1717Tristan Gingold2021-04-111-3/+1
* src: Clarify error for conditional signal assignment.Ondrej Ille2021-04-111-1/+2
* src: Allow case generate only in VHDL 2008.Ondrej Ille2021-04-111-0/+1
* src: Unify check for VHDL at least 2008Ondrej Ille2021-04-111-47/+25
* trans-chap9.adb: fix out of scope reference.Tristan Gingold2021-04-101-2/+3
* testsuite/gna: add a test for #1718Tristan Gingold2021-04-102-0/+20
* ghdldrv,configure: allow LIB.UNIT name for -e/-r commands. Fix #1718Tristan Gingold2021-04-108-38/+129
* src/grt: Avhpi - Specify enum numbers as in VHDL LRM. Add 2008 version enumer...Ondrej Ille2021-04-081-5/+483
* testsuite: Adjust regression for new format of PSL report.Ondrej Ille2021-04-082-6/+12
* src: Fix PSL start count assignment for PSL endpoints.Ondrej Ille2021-04-081-9/+9
* src: Introduce two separate PSL counters (Finish and Start).Ondrej Ille2021-04-085-19/+57
* src: Adjust grt-psl to use PSL RTI type.Ondrej Ille2021-04-081-5/+5
* src: Adjust disp-rti for new PSL RTI type.Ondrej Ille2021-04-081-12/+27
* src: grt-utils. Fix path look-up fo PSL RTis since they now have Parent.Ondrej Ille2021-04-082-8/+7
* src: Define PSL type RTI with simplified assertion state.Ondrej Ille2021-04-085-6/+110
* grt: Dont build path for PSL RTIs. They dont have parents, therefore Get_Path...Ondrej Ille2021-04-081-0/+12
* testsuite/gna: add a test for #1715Tristan Gingold2021-04-073-0/+80
* vhdl-sem_decls.adb: handle both anonymous signal and signal attribute. Fix #...Tristan Gingold2021-04-071-0/+2
* testsuite: Adjust regression for caret-diagnostics on by default.Ondrej Ille2021-04-053-0/+14
* src: Set fcaret-diagnostics to be on by default. Clean unused Warn_Undriven.Ondrej Ille2021-04-051-4/+1
* src: Remove obsolete FIXME, file_open_information parsed. Default "IN"/"READ_...Ondrej Ille2021-04-051-1/+0
* testsuite.py: set exit statusTristan Gingold2021-04-051-1/+5
* ghdlsynth.adb: fix a previous commitTristan Gingold2021-04-051-1/+1
* testsuite/gna: add more tests for #1708Tristan Gingold2021-04-056-0/+176
* vhdl-sem_psl.adb: handle goto/equal repeated sequence. For #1708Tristan Gingold2021-04-051-8/+20
* vhdl-parse_psl.adb: handle parenthesis boolean prefixes. For #1708Tristan Gingold2021-04-051-29/+62
* vhdl and libraries: add support for binding to a foreign moduleTristan Gingold2021-04-057-124/+237
* ghdldrv/: initial support for foreign modulesTristan Gingold2021-04-055-11/+28
* vhdl: add Iir_Kind_Foreign_ModuleTristan Gingold2021-04-0511-631/+757
* pnodes.py: fix a typoTristan Gingold2021-04-051-1/+1
* psl-subsets: fix fallout of #1708Tristan Gingold2021-04-031-2/+3
* src: Better reporting of missing parenthesis.Ondrej Ille2021-04-031-5/+24
* src: Add Resync_To_End_Of_External_Name.Ondrej Ille2021-04-031-1/+21
* testsuite/gna: add a test for #1708Tristan Gingold2021-04-032-0/+44
* psl: prefix of goto/non-consecutive repetition is a bool. Fix #1708Tristan Gingold2021-04-036-58/+118
* vhdl-parse.adb: fix indentation (for #1711)Tristan Gingold2021-04-031-30/+31
* src: More detailed message on invalid variable locations.Ondrej Ille2021-04-031-12/+46
* src: Provide nicer message if Tok_Is is swapped with Tok_Assign for alias.Ondrej Ille2021-04-031-2/+6
* Add base support for the attribue element in vhdl 08Anselmo952021-04-036-0/+136
* testsuite/gna: add a testcase for #1704Tristan Gingold2021-04-025-0/+82
* doc/using: document synth option '--out' (#1705)Unai Martinez-Corral2021-03-311-7/+26
* testsuite/gna: add a test for #1697Tristan Gingold2021-03-304-0/+49
* vhdl-sem_expr.adb: detect incorrect static aggregate length mismatch. For #1697Tristan Gingold2021-03-301-1/+9
* testsuite/synth: add a test for #1703Tristan Gingold2021-03-292-0/+44
* netlists-disp_vhdl: do not display edge net when not needed. Fix #1703Tristan Gingold2021-03-293-25/+49
* ghdlsynth: add --out=raw-vhdl. For #1702Tristan Gingold2021-03-291-7/+7
* ci/msys2: MINGW_INSTALLS is deprecated, use MINGW_ARCH insteadumarcor2021-03-291-1/+1
* vhdl-parse_psl: avoid crash in case of error. For #1701Tristan Gingold2021-03-281-3/+8
* vhdl-parse_psl: minor reformatingTristan Gingold2021-03-281-10/+9