| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | openieee: complete std_logic_1164 package for vhdl 2008. | Tristan Gingold | 2018-12-30 | 1 | -14/+25 |
| * | openieee: generate shift and rot for vhdl 2008 (WIP). | Tristan Gingold | 2018-12-29 | 1 | -0/+68 |
| * | openieee: add to_01 bodies (WIP) | Tristan Gingold | 2018-12-29 | 1 | -0/+53 |
| * | openieee: WIP for vhdl 2008. | Tristan Gingold | 2018-12-29 | 1 | -0/+55 |
| * | openieee: add support of vhdl 2008 (WIP) | Tristan Gingold | 2018-12-29 | 1 | -26/+45 |
| * | openieee: fix missing subprograms, fix wrong interface name. | Tristan Gingold | 2015-12-20 | 1 | -5/+5 |
| * | openieee: add numeric_std and numeric_bit. | Tristan Gingold | 2015-12-16 | 1 | -0/+361 |
