| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | python: execute 'black' | eine | 2020-08-23 | 1 | -2/+0 |
| * | vhdl: add force and release tokens. For #1416 | Tristan Gingold | 2020-08-01 | 1 | -53/+55 |
| * | vhdl: create default configuration for a vunit. Fix #1372 | Tristan Gingold | 2020-06-15 | 1 | -158/+159 |
| * | vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662 | Tristan Gingold | 2020-06-02 | 1 | -0/+4 |
| * | vhdl: recognize 1164 condition operator, handle in synth. | Tristan Gingold | 2019-08-30 | 1 | -10/+16 |
| * | vhdl: recognize PSL units reserved words. | Tristan Gingold | 2019-08-16 | 1 | -44/+47 |
| * | Add support for PSL assumptions, used in formal verification (#880) | Pepijn de Vos | 2019-08-07 | 1 | -23/+24 |
| * | vhdl: parse and analyze restrict directive. | Tristan Gingold | 2019-07-04 | 1 | -20/+22 |
| * | Rework libghdl build/install procedure (#840) | 1138-4EB | 2019-06-17 | 1 | -0/+203 |
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index : iCE40/ghdl | |
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