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* Add a python script to automatically generate disp_tree.Tristan Gingold2014-09-251-1/+4
* Keep names in the tree.Tristan Gingold2014-09-021-32/+61
* Resolve expression in variable assignment when target is an aggregate.Tristan Gingold2014-06-281-2/+14
* Use library unit instead of design unit.Tristan Gingold2014-06-241-2/+2
* Sync tree: add parsing of AMS-VHDL, add Darwin syntax in asm files.Tristan Gingold2013-12-171-1/+2
* ghdl 0.29 release.gingold2010-01-121-0/+1
* New feature: all-sensitized processes (for vhdl 2008)gingold2008-09-061-1/+1
* direct drivers and bugs fixgingold2006-10-021-19/+19
* First import from sourcesgingold2005-09-241-0/+113