| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | synth: propagate enable condition to expressions. For #1273 | Tristan Gingold | 2020-05-01 | 1 | -13/+17 |
| * | synth-oper: handle more operations (comparaisons from std_logic_unsigned). | Tristan Gingold | 2020-04-23 | 1 | -1/+2 |
| * | types: introduce Direction_Type, which replaces Iir_Direction. | Tristan Gingold | 2020-04-20 | 1 | -2/+2 |
| * | synth-aggr: check bound errors. Fix #1239 | Tristan Gingold | 2020-04-19 | 1 | -25/+68 |
| * | synth-aggr: fix record aggregate element order. Fix #1217 | Tristan Gingold | 2020-04-12 | 1 | -4/+7 |
| * | synth: add value_memory and use it to store objects value. | Tristan Gingold | 2020-04-06 | 1 | -0/+433 |
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index : iCE40/ghdl | |
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