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* synth: rework (again) memory inference.Tristan Gingold2020-02-101-37/+0
| | | | | | Preliminary work to support multi-clock memories. Strengthen and fix fallout of Check_Connected. Rename synth.inference to netlists.inference.
* synth: rework partial assignmentsTristan Gingold2019-08-271-0/+2
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* synth: refactor inference, add comment, strengthen check.Tristan Gingold2019-08-011-1/+7
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* Add netlist generation infrastructure.Tristan Gingold2017-01-311-0/+29