iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Replace fat accesses by bounds accesses	Tristan Gingold	2015-08-29	1	-7/+19
*	Fix regression for expanded names.	Tristan Gingold	2015-05-27	1	-10/+17
*	Handle signal attribute in declarations. Fix alias of implicit signal.	Tristan Gingold	2015-05-27	1	-24/+77
*	vhdl 00+: allow non-protected shared variables with -frelaxed-rules	Tristan Gingold	2015-05-15	1	-1/+1
*	Always report pure rules violation, but as a warning in 93c or -frelaxed-rules	Tristan Gingold	2015-05-12	1	-25/+23
*	aliases: avoid crash in case of mismatch between function and procedure.	Tristan Gingold	2015-05-12	1	-0/+6
*	Report incorrect use of 'Base.	Tristan Gingold	2015-05-09	1	-0/+3
*	vhdl08: block configuration for if-generate statements.	Tristan Gingold	2015-01-10	1	-3/+7
*	Initial rework for vhdl 2008 generate statements.	Tristan Gingold	2015-01-03	1	-3/+5
*	Rewrite sem_scopes tables for speed-up (and clarification).	Tristan Gingold	2014-12-26	1	-0/+1
*	Use same node for implicit and explicit subprogram declarations.	Tristan Gingold	2014-12-15	1	-47/+50
*	iirs: reduce size of interface objects.	Tristan Gingold	2014-12-14	1	-15/+0
*	iirs: reduce size of signal_declaration.	Tristan Gingold	2014-12-14	1	-31/+31
*	Put attribute_value_chain in parent.	Tristan Gingold	2014-12-14	1	-0/+1
*	Create src/vhdl subdirectory.	Tristan Gingold	2014-11-04	1	-0/+3018