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* Replace fat accesses by bounds accessesTristan Gingold2015-08-291-7/+19
| | | | | translate: separate info for signals from object. Improve some error messages.
* Fix regression for expanded names.Tristan Gingold2015-05-271-10/+17
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* Handle signal attribute in declarations. Fix alias of implicit signal.Tristan Gingold2015-05-271-24/+77
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* vhdl 00+: allow non-protected shared variables with -frelaxed-rulesTristan Gingold2015-05-151-1/+1
| | | | Implements ticket 62.
* Always report pure rules violation, but as a warning in 93c or -frelaxed-rulesTristan Gingold2015-05-121-25/+23
| | | | For ticket 57.
* aliases: avoid crash in case of mismatch between function and procedure.Tristan Gingold2015-05-121-0/+6
| | | | Fix ticket 55.
* Report incorrect use of 'Base.Tristan Gingold2015-05-091-0/+3
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* vhdl08: block configuration for if-generate statements.Tristan Gingold2015-01-101-3/+7
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* Initial rework for vhdl 2008 generate statements.Tristan Gingold2015-01-031-3/+5
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* Rewrite sem_scopes tables for speed-up (and clarification).Tristan Gingold2014-12-261-0/+1
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* Use same node for implicit and explicit subprogram declarations.Tristan Gingold2014-12-151-47/+50
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* iirs: reduce size of interface objects.Tristan Gingold2014-12-141-15/+0
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* iirs: reduce size of signal_declaration.Tristan Gingold2014-12-141-31/+31
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* Put attribute_value_chain in parent.Tristan Gingold2014-12-141-0/+1
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* Create src/vhdl subdirectory.Tristan Gingold2014-11-041-0/+3018