iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	vhdl: move sem* packages to vhdl children.	Tristan Gingold	2019-05-05	1	-411/+0
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*	vhdl: move canon to a vhdl child package.	Tristan Gingold	2019-05-05	1	-2/+2
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*	vhdl: move disp_tree and disp_vhdl as vhdl child.	Tristan Gingold	2019-05-04	1	-7/+7
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*	vhdl: move parse package as vhdl child.	Tristan Gingold	2019-05-04	1	-3/+3
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*	vhdl: move scanner under vhdl hierarchy.	Tristan Gingold	2019-05-04	1	-5/+5
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*	Finish_Compilation: do not raise Compilation_Error.	Tristan Gingold	2018-12-16	1	-3/+3
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*	Rename overloaded Load_File and export it to python.	Tristan Gingold	2018-12-13	1	-2/+2
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*	parse: factorize and streamline code.	Tristan Gingold	2018-12-06	1	-0/+1
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*	sem_lib: avoid missing location in error message.	Tristan Gingold	2018-12-03	1	-1/+1
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*	Keep source file entry in design file to avoid searching the file.	Tristan Gingold	2018-11-26	1	-19/+24
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*	sem_lib: add header.	Tristan Gingold	2018-11-15	1	-0/+17
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*	Create sem_lib from libraries.	Tristan Gingold	2018-11-14	1	-0/+388