iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl: extract vhdl.errors from errorout.	Tristan Gingold	2019-05-08	1	-0/+1
*	vhdl: renames iirs_walk to vhdl-nodes_walk	Tristan Gingold	2019-05-08	1	-1/+1
*	vhdl: move iirs_utils to vhdl.utils	Tristan Gingold	2019-05-06	1	-1/+1
*	vhdl: move std_standard package to vhdl child.	Tristan Gingold	2019-05-05	1	-2/+2
*	vhdl: move sem* packages to vhdl children.	Tristan Gingold	2019-05-05	1	-7/+7
*	vhdl: move canon to a vhdl child package.	Tristan Gingold	2019-05-05	1	-2/+2
*	vhdl: move disp_tree and disp_vhdl as vhdl child.	Tristan Gingold	2019-05-04	1	-3/+3
*	vhdl: move parse package as vhdl child.	Tristan Gingold	2019-05-04	1	-3/+4
*	vhdl: move tokens as vhdl child package.	Tristan Gingold	2019-05-04	1	-2/+2
*	vhdl: move scanner under vhdl hierarchy.	Tristan Gingold	2019-05-04	1	-5/+5
*	Extract grt.astdio.vhdl from grt.astdio.	Tristan Gingold	2018-12-16	1	-0/+1
*	files_map: renaming for consistency.	Tristan Gingold	2018-12-14	1	-2/+2
*	simul-debugger: improve info signals.	Tristan Gingold	2017-12-21	1	-45/+147
*	simul-debugger: add run command.	Tristan Gingold	2017-12-20	1	-5/+39
*	simul-debugger: add debug_upblock.	Tristan Gingold	2017-12-11	1	-0/+18
*	simul-debugger: add debug_bt (internal debugging procedure).	Tristan Gingold	2017-12-08	1	-0/+12
*	simul: handle package interface, remove iir_value_environment.	Tristan Gingold	2017-12-05	1	-2/+1
*	simul: add iir_value_instance, remove package_instances.	Tristan Gingold	2017-12-03	1	-6/+8
*	simul: Remove scope_type (unused).	Tristan Gingold	2017-12-03	1	-1/+0
*	simul: refactoring: scope is now the corresponding sim_info.	Tristan Gingold	2017-12-03	1	-1/+1
*	Create the simul.ads package (for a namespace).	Tristan Gingold	2017-11-24	1	-0/+2283