iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl: rename iirs to vhdl.nodes	Tristan Gingold	2019-05-05	1	-1/+1
*	simul: remove ports_map from instances (not used).	Tristan Gingold	2018-01-02	1	-3/+0
*	simul: Add subprogram body in frames.	Tristan Gingold	2017-12-21	1	-0/+3
*	simul: Add ref in info to ease debugging.	Tristan Gingold	2017-12-21	1	-0/+3
*	simul: add Kind_Protected instead of reusing Kind_Frame.	Tristan Gingold	2017-12-21	1	-1/+2
*	simul-debugger: improve info signals.	Tristan Gingold	2017-12-21	1	-2/+4
*	simul: handle package interface, remove iir_value_environment.	Tristan Gingold	2017-12-05	1	-13/+2
*	simul: handle instantiated package.	Tristan Gingold	2017-12-05	1	-0/+5
*	simul: add iir_value_instance, remove package_instances.	Tristan Gingold	2017-12-03	1	-0/+5
*	simul: Remove scope_type (unused).	Tristan Gingold	2017-12-03	1	-30/+0
*	simul: add global_info.	Tristan Gingold	2017-12-03	1	-1/+6
*	simul: refactoring: scope is now the corresponding sim_info.	Tristan Gingold	2017-12-03	1	-1/+73
*	Create the simul.ads package (for a namespace).	Tristan Gingold	2017-11-24	1	-0/+481