iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl/translate: handle vhdl-93 'last_value. Fix #1440	Tristan Gingold	2020-08-26	1	-23/+149
*	vhdl: add ghdl_integer_index_check_failed. For #1257	Tristan Gingold	2020-06-17	1	-1/+1
*	types: introduce Direction_Type, which replaces Iir_Direction.	Tristan Gingold	2020-04-20	1	-3/+3
*	vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.	Tristan Gingold	2019-05-10	1	-1/+1
*	vhdl: extract vhdl.errors from errorout.	Tristan Gingold	2019-05-08	1	-1/+1
*	vhdl: move iirs_utils to vhdl.utils	Tristan Gingold	2019-05-06	1	-1/+1
*	vhdl: move evaluation to vhdl child.	Tristan Gingold	2019-05-05	1	-1/+1
*	vhdl: move std_standard package to vhdl child.	Tristan Gingold	2019-05-05	1	-1/+1
*	translate: renaming of Kind_Expr/Get_Ortho_Expr.	Tristan Gingold	2018-12-11	1	-1/+1
*	Rework translation of unbounded and complex types.	Tristan Gingold	2018-10-21	1	-4/+2
*	Use flist for enumerations.	Tristan Gingold	2017-11-07	1	-5/+5
*	Create default value for ports.	Tristan Gingold	2017-05-09	1	-32/+3
*	Add 'Image and 'Value for i64.	Tristan Gingold	2017-01-13	1	-14/+13
*	iirs: renames Iir_Kinds_Scalar_Type_Definition	Tristan Gingold	2017-01-02	1	-2/+4
*	translate: refactoring for ortho_info_type.	Tristan Gingold	2016-12-30	1	-2/+2
*	Add Eval_Attribute_Parameter_Or_1	Tristan Gingold	2016-09-30	1	-1/+1
*	Fix translation of leftof/rightof.	Tristan Gingold	2016-07-30	1	-2/+4
*	ortho: rename start/finish_const_value to start/finish_init_value.	Tristan Gingold	2016-02-21	1	-2/+2
*	Do not create signal type for scalar type.	Tristan Gingold	2015-12-20	1	-5/+4
*	Pass signal values to interfaces. 'sigptr' optimization.	Tristan Gingold	2015-12-18	1	-27/+13
*	Check enumeration overflow for succ/pred attributes.	Tristan Gingold	2015-05-15	1	-12/+24
*	Split translation into child packages.	Tristan Gingold	2014-11-09	1	-0/+938