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path: root/src/vhdl/translate/trans-chap5.adb
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* trans-chap5: handle record subtypes in port association.Tristan Gingold2020-05-131-13/+22
* vhdl: minimal support of interface package in entities. For #1262Tristan Gingold2020-04-271-13/+25
* vhdl: fix crash on vhdl08 sub-sub index constraint. For #1191Tristan Gingold2020-04-071-3/+2
* vhdl: improve support of AMS-vhdl (array and record natures, source quantities)Tristan Gingold2019-12-281-3/+3
* vhdl: handle P32 in connect_scalar. Fix #918Tristan Gingold2019-09-051-1/+2
* vhdl: translate anonymous_signal_declaration.Tristan Gingold2019-07-031-8/+2
* vhdl: add anonymous_signal_declaration.Tristan Gingold2019-07-031-1/+7
* vhdl: extract vhdl.errors from errorout.Tristan Gingold2019-05-081-1/+1
* vhdl: move iirs_utils to vhdl.utilsTristan Gingold2019-05-061-1/+1
* vhdl/translate: check_composite_match: rename and handle records.Tristan Gingold2019-05-031-3/+4
* translate: renaming, support constrained unbounded record aggregates.Tristan Gingold2018-12-071-4/+4
* trans-chap5: do subtype conversion in signal association.Tristan Gingold2018-11-101-2/+10
* Rework translation of unbounded and complex types.Tristan Gingold2018-10-211-18/+16
* translation: for port assiation by expression: handle formal before actual.Tristan Gingold2018-02-201-2/+2
* Translate; properly separates translation of types from translation of subtypes.Tristan Gingold2018-01-171-1/+2
* trans-chap3: unbox recod in Get_Composite_Base.Tristan Gingold2017-11-271-1/+1
* Use flist for disconnection specification and component specification.Tristan Gingold2017-11-081-3/+2
* Rename In_Conversion/Out_Conversion to Actual_Conversion/Formal_Conversion.Tristan Gingold2017-09-131-6/+6
* translate: renaming.Tristan Gingold2017-06-211-3/+4
* Fix crash of implicit conversion in instantiation.Tristan Gingold2017-06-121-2/+14
* Create default value for ports.Tristan Gingold2017-05-091-35/+49
* Minor optimization: avoid calls to Get_Association_Formal.Tristan Gingold2017-05-081-7/+6
* vhdl08: unbounded records (WIP - individual association)Tristan Gingold2017-03-091-1/+1
* translate: WIP - refactoring for unbounded records.Tristan Gingold2017-01-021-1/+1
* translate: rename get_array_base to get_composite_baseTristan Gingold2017-01-021-3/+3
* translate: refactoring for ortho_info_type.Tristan Gingold2016-12-301-6/+6
* canon: do not set formal of association by position.Tristan Gingold2016-10-191-23/+30
* Rework AST to setup ownership and reference policy.Tristan Gingold2016-10-111-2/+2
* Fix attribute specification with non-static expressionTristan Gingold2016-10-041-9/+32
* Emit error message during analysis for missing generic association.Tristan Gingold2016-10-011-0/+1
* vhdl08: more support for interface subprograms.Tristan Gingold2016-09-271-1/+2
* vhdl08: handle interface type in generic-mapped packageTristan Gingold2016-09-151-0/+2
* Enable vest recursive instantiation test.Tristan Gingold2016-07-031-5/+11
* Initial support of direct recursive instantiation.Tristan Gingold2016-07-031-116/+160
* translation: avoid memory leak while allocating ports.Tristan Gingold2016-03-161-2/+3
* Set type staticness for a constant declaration and attribute specification.Tristan Gingold2016-01-111-10/+11
* Pass signal values to interfaces. 'sigptr' optimization.Tristan Gingold2015-12-181-245/+271
* Adjust previous patch (destroy types for default port values).Tristan Gingold2015-09-031-3/+3
* Translate: explicitly clean transient types.Tristan Gingold2015-09-021-4/+4
* Destroy types of default generic values.Tristan Gingold2015-09-011-8/+10
* Replace fat accesses by bounds accessesTristan Gingold2015-08-291-24/+7
* Split translation into child packages.Tristan Gingold2014-11-091-0/+765
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