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path: root/src/vhdl/translate/trans-chap9.adb
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* vhdl: move ieee packages to vhdl children.Tristan Gingold2019-05-051-2/+2
* vhdl: move std_standard package to vhdl child.Tristan Gingold2019-05-051-1/+1
* vhdl: move canon to a vhdl child package.Tristan Gingold2019-05-051-2/+2
* Remove unused is_ref for choices. Adjust.Tristan Gingold2019-01-021-4/+0
* translate: renaming of Kind_Expr/Get_Ortho_Expr.Tristan Gingold2018-12-111-6/+7
* translate: refactoring.Tristan Gingold2018-11-201-1/+1
* vhdl/translate: improve support of unbounded arrays.Tristan Gingold2018-11-091-2/+2
* trans-chap9: add a guard.Tristan Gingold2018-10-241-0/+9
* trans: avoid translation of coverage report twice.Tristan Gingold2018-10-231-6/+85
* Rework translation of unbounded and complex types.Tristan Gingold2018-10-211-4/+3
* Add Maybe_Ref_Chain (WIP).Tristan Gingold2018-09-201-0/+4
* Fix warning: use clause for package has no effectVicente Bergas2018-05-031-3/+0
* translate: handle anonymous types in formal; handle multiple conversions.Tristan Gingold2018-02-181-8/+22
* Translate; properly separates translation of types from translation of subtypes.Tristan Gingold2018-01-171-19/+23
* sem_inst: fix relocation of instances in instances.Tristan Gingold2017-12-211-0/+1
* Rework list implementation, use iterator.Tristan Gingold2017-11-111-4/+11
* Remove List_Others, cleanup lists.Tristan Gingold2017-11-081-2/+1
* Use Flist for array indexes.Tristan Gingold2017-11-061-0/+31
* Add extended locations (elocations). Still WIPTristan Gingold2017-10-181-1/+0
* Rename In_Conversion/Out_Conversion to Actual_Conversion/Formal_Conversion.Tristan Gingold2017-09-131-1/+1
* Silent spurious warning.Tristan Gingold2017-06-141-0/+5
* Translation: separate subprogram translation spec and body.Tristan Gingold2017-05-181-2/+4
* Create default value for ports.Tristan Gingold2017-05-091-201/+276
* vhdl08: more on unbounded records (WIP)Tristan Gingold2017-02-231-1/+1
* removing PSL coverage hit default reportThomas Hiscock2017-01-051-2/+4
* translate: rename get_array_base to get_composite_baseTristan Gingold2017-01-021-2/+2
* translate: refactoring for ortho_info_type.Tristan Gingold2016-12-301-12/+12
* ownership: check tree after sem and canon.Tristan Gingold2016-11-051-4/+14
* canon: do not set formal of association by position.Tristan Gingold2016-10-191-14/+21
* iirs: rename base_type to number_base_type to avoid confusion.Tristan Gingold2016-10-131-1/+1
* Rework AST to setup ownership and reference policy.Tristan Gingold2016-10-111-1/+2
* iirs: add Forward_Ref linksTristan Gingold2016-09-301-1/+2
* vhdl08: add support of case-generate statementTristan Gingold2016-07-071-91/+326
* Initial support of direct recursive instantiation.Tristan Gingold2016-07-031-5/+17
* PSL: add clocked SERE, make endpoints visible from VHDL.Tristan Gingold2016-03-221-35/+69
* PSL: add counters, generate rti and add --psl-reportTristan Gingold2016-03-181-25/+12
* PSL translate: handle bit type.Tristan Gingold2016-03-181-4/+8
* translate: separate decl and stmt elab subprograms.Tristan Gingold2016-02-231-22/+195
* translate: minor reformating.Tristan Gingold2016-02-211-24/+19
* Tentative fix for issue43.Tristan Gingold2016-02-171-1/+1
* psl: cover directive works on a sequence, not on a property.Tristan Gingold2016-02-141-1/+7
* PSL: move canon code to canon.adbTristan Gingold2016-02-141-50/+26
* Pass signal values to interfaces. 'sigptr' optimization.Tristan Gingold2015-12-181-2/+6
* Suppress stack switching; save process state in secondary stack.Tristan Gingold2015-09-041-0/+29
* Translate: explicitly clean transient types.Tristan Gingold2015-09-021-1/+5
* Allow allocators in default value of subprogramsTristan Gingold2015-08-291-48/+116
* Replace fat accesses by bounds accessesTristan Gingold2015-08-291-37/+32
* Rework procedure calls, now use a record to pass parameters.Tristan Gingold2015-06-051-2/+1
* Fix entity instantiation with extended identifier.Tristan Gingold2015-03-311-3/+5
* Keep and handle simple name for Block_Specification.Tristan Gingold2015-01-161-2/+2
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