| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | translate: add a flag to disable elaboration | Tristan Gingold | 2023-01-31 | 1 | -0/+3 |
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| * | vhdl: refactoring - remove trans_be, mainly added to vhdl-back_end | Tristan Gingold | 2023-01-16 | 1 | -31/+6 |
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| * | update license headers | umarcor | 2021-01-14 | 1 | -11/+9 |
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| * | vhdl: add scalar_size. Size of scalar types is computed during analysis. | Tristan Gingold | 2020-04-06 | 1 | -3/+0 |
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| * | vhdl: rename iirs to vhdl.nodes | Tristan Gingold | 2019-05-05 | 1 | -1/+1 |
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| * | vhdl: supports VHPIDIRECT in mcode backend. | Tristan Gingold | 2019-04-27 | 1 | -3/+1 |
| | | | | | | src: add hash.ad[sb], interning.ad[sb] Automatically link with vhpidirect libraries. | ||||
| * | Add --max-stack-alloc option, check stack allocation of complex object. | Tristan Gingold | 2018-11-23 | 1 | -0/+4 |
| | | | | | Fix #692 | ||||
| * | Add support for --time-resolution (jit only). Fix #613 | Tristan Gingold | 2018-08-10 | 1 | -4/+3 |
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| * | translation: remove some use of Nam_Buffer. | Tristan Gingold | 2018-01-20 | 1 | -5/+4 |
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| * | Split translation into child packages. | Tristan Gingold | 2014-11-09 | 1 | -8/+8 |
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| * | Move translate and simulate. | Tristan Gingold | 2014-11-05 | 1 | -0/+120 |
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index : iCE40/ghdl | |
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