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* synth: initial support for for-generate statement.Tristan Gingold2019-07-201-5/+8
* synth: do not crash on use of std_logic_1164 2008.Tristan Gingold2019-07-101-10/+4
* vhdl-annotations: partial revert of previous patch forTristan Gingold2019-07-041-0/+10
* vhdl: rename Cover_Statement to Cover_Directive.Tristan Gingold2019-07-041-1/+1
* vhdl: parse and analyze restrict directive.Tristan Gingold2019-07-041-1/+2
* synth: handle vhdl2008 std_logic_1164, handle anonymous_signal.Tristan Gingold2019-07-041-2/+2
* vhdl: translate anonymous_signal_declaration.Tristan Gingold2019-07-031-0/+2
* synth: handle concurrent assertions.Tristan Gingold2019-07-021-1/+2
* vhdl: move annotations from simul to vhdl.Tristan Gingold2019-06-291-0/+1315