iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl: renames Conditional_Expression to Conditional_Expression_Chain.	Tristan Gingold	2019-09-02	1	-1/+1
*	vhdl: handle assume in verification units.	Tristan Gingold	2019-08-20	1	-0/+2
*	synth: handle verification units.	Tristan Gingold	2019-08-20	1	-31/+57
*	vhdl: parse verification unit (WIP).	Tristan Gingold	2019-08-17	1	-0/+2
*	vhdl: improve reprint of inertial association.	Tristan Gingold	2019-08-11	1	-27/+37
*	Add support for PSL assumptions, used in formal verification (#880)	Pepijn de Vos	2019-08-07	1	-1/+2
*	vhdl: cleanup in clear_instantiation_configuration.	Tristan Gingold	2019-07-13	1	-2/+2
*	vhdl: minor reformating.	Tristan Gingold	2019-07-11	1	-3/+3
*	vhdl: rename Cover_Statement to Cover_Directive.	Tristan Gingold	2019-07-04	1	-1/+1
*	vhdl: parse and analyze restrict directive.	Tristan Gingold	2019-07-04	1	-14/+26
*	vhdl: add anonymous_signal_declaration.	Tristan Gingold	2019-07-03	1	-13/+61
*	vhdl: renames disp_vhdl to prints	Tristan Gingold	2019-05-30	1	-2/+2
*	psl: add psl-types, psl-nodes_priv.	Tristan Gingold	2019-05-10	1	-0/+1
*	Extract psl-errors from errorout.	Tristan Gingold	2019-05-10	1	-1/+2
*	vhdl: extract vhdl.errors from errorout.	Tristan Gingold	2019-05-08	1	-0/+1
*	vhdl: remove too strict assertion in canon. Fix #816	Tristan Gingold	2019-05-07	1	-11/+3
*	vhdl-nodes_utils: renaming.	Tristan Gingold	2019-05-07	1	-13/+13
*	vhdl: renames iir_chains to vhdl.nodes_utils. Remove iir_chain_handling.	Tristan Gingold	2019-05-06	1	-11/+12
*	vhdl: move iirs_utils to vhdl.utils	Tristan Gingold	2019-05-06	1	-1/+1
*	vhdl: move sem* packages to vhdl children.	Tristan Gingold	2019-05-05	1	-3/+3
*	vhdl: move canon to a vhdl child package.	Tristan Gingold	2019-05-05	1	-0/+3290