| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | vhdl: parse and analyze force/release signal assignment statements. | Tristan Gingold | 2020-08-01 | 1 | -0/+1 |
| * | types: introduce Direction_Type, which replaces Iir_Direction. | Tristan Gingold | 2020-04-20 | 1 | -1/+1 |
| * | vhdl: add scalar_size. Size of scalar types is computed during analysis. | Tristan Gingold | 2020-04-06 | 1 | -0/+1 |
| * | vhdl: rename iirs to vhdl.nodes | Tristan Gingold | 2019-05-05 | 1 | -1/+1 |
| * | vhdl: move disp_tree and disp_vhdl as vhdl child. | Tristan Gingold | 2019-05-04 | 1 | -0/+53 |
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index : iCE40/ghdl | |
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