aboutsummaryrefslogtreecommitdiffstats
path: root/src/vhdl/vhdl-nodes_meta.ads
Commit message (Expand)AuthorAgeFilesLines
* vhdl-sem_inst: handle suspend_stateTristan Gingold2023-01-041-1/+5
* vhdl: add Get/Set_Associated_package. For #2264Tristan Gingold2022-12-181-0/+2
* vhdl-nodes: add Get/Set_Instantiated_Header.Tristan Gingold2022-12-161-0/+2
* vhdl-nodes: add Get/Set_Associated_Subprogram.Tristan Gingold2022-11-301-0/+2
* vhdl: add Determined_Aggregate_Flag field. For #2166Tristan Gingold2022-08-101-0/+2
* vhdl: add an owner to interface type definitionTristan Gingold2022-08-071-0/+2
* vhdl: add support for default in interface subprogram. Fix #2163Tristan Gingold2022-08-071-0/+4
* vhdl-nodes: add Get/Set_Stop_Flag. For #2150Tristan Gingold2022-07-291-0/+2
* vhdl-nodes: add Get/Set_Reference_Terminal_FlagTristan Gingold2022-07-251-0/+2
* vhdl-nodes: renaming.Tristan Gingold2022-07-211-4/+5
* vhdl-nodes: add Inertial_Flag for association_element_by_expressionTristan Gingold2022-06-121-0/+2
* vhdl-canon: add Canon_Add_Suspend_StateTristan Gingold2022-05-261-1/+5
* vhdl: parse return identifier (v19)Tristan Gingold2022-03-041-0/+2
* vhdl: parse PSL inherit spec. For #1899Tristan Gingold2021-11-041-2/+2
* Add parsing of case? statement and simple test.Brian Padalino2021-09-241-0/+2
* vhdl and psl: parse sync_abort and async_abort. For #1654Tristan Gingold2021-08-301-0/+2
* vhdl: remove unused Get/Set_Alias_DeclarationTristan Gingold2021-05-161-2/+0
* vhdl: add Iir_Kind_Foreign_ModuleTristan Gingold2021-04-051-1/+3
* update license headersumarcor2021-01-141-11/+9
* vhdl: fix reprint of vhdl08 array element constraints.Tristan Gingold2021-01-051-0/+4
* vhdl: handle locally static attributes on entity/architecture/configurationsTristan Gingold2020-12-081-0/+2
* vhdl: parse subprogram instantiations. For #1470Tristan Gingold2020-09-241-0/+3
* vhdl: parse and analyze force/release signal assignment statements.Tristan Gingold2020-08-011-0/+10
* vhdl: replace base_type with parent_type in nodesTristan Gingold2020-07-221-2/+2
* vhdl: create default configuration for a vunit. Fix #1372Tristan Gingold2020-06-151-0/+3
* Synthesis of PSL prev function.Tristan Gingold2020-06-021-2/+2
* vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662Tristan Gingold2020-06-021-1/+7
* types: introduce Direction_Type, which replaces Iir_Direction.Tristan Gingold2020-04-201-6/+6
* vhdl: add scalar_size. Size of scalar types is computed during analysis.Tristan Gingold2020-04-061-0/+8
* synthesis: add option --vendor-library= for synthesis.Tristan Gingold2020-03-101-0/+2
* ams-vhdl: handle zoh, ltf and ztf attributes.Tristan Gingold2019-12-311-0/+4
* ams-vhdl: check nature for record natures and terminals.Tristan Gingold2019-12-301-0/+2
* vhdl: improve support of AMS-vhdl (array and record natures, source quantities)Tristan Gingold2019-12-281-0/+44
* vhdl: add Has_Delay_Machanism for optional 'inertial' printing.Tristan Gingold2019-12-261-0/+2
* vhdl: add exit/next flags.Tristan Gingold2019-09-181-0/+4
* vhdl: renames Conditional_Expression to Conditional_Expression_Chain.Tristan Gingold2019-09-021-2/+2
* synth: handle verification units.Tristan Gingold2019-08-201-0/+2
* vhdl: declare verification units (WIP).Tristan Gingold2019-08-161-0/+6
* vhdl: remove unused Get/Set_Choice_Order.Tristan Gingold2019-08-091-2/+0
* vhdl-disp_vhdl: print literals and identifiers from the source.Tristan Gingold2019-05-291-0/+2
* vhdl: get rid of Get/Set_Physical_Unit.Tristan Gingold2019-05-281-2/+0
* psl: add psl-types, psl-nodes_priv.Tristan Gingold2019-05-101-0/+1
* vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.Tristan Gingold2019-05-101-12/+12
* vhdl: move nodes_meta package to vhdl child.Tristan Gingold2019-05-061-0/+924