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* vhdl-evaluation: free temporary nodeTristan Gingold2023-03-271-2/+3
* trans-chap8: free nodes created by canon for conditional assignmentTristan Gingold2023-03-271-5/+23
* vhdl-sem_types: free temporary nodesTristan Gingold2023-03-271-9/+24
* eval_static_expr_orig: free temporary node for range attributesTristan Gingold2023-03-261-17/+64
* translate_entity_init_ports: free a temporary nodeTristan Gingold2023-03-261-0/+4
* sem_name_clean_1: also free namesTristan Gingold2023-03-261-4/+9
* finish_sem_name_1: free unused nodeTristan Gingold2023-03-261-0/+1
* eval_static_expr: improve tracking of originTristan Gingold2023-03-261-32/+47
* Canon_Concurrent_Simple_Signal_Assignment: avoid leakTristan Gingold2023-03-261-2/+4
* trans-chap8(translate_wait_statement): free sensitivity listTristan Gingold2023-03-261-1/+6
* vhdl-canon: rewrite Canon_Concurrent_Conditional_Signal_AssignmentTristan Gingold2023-03-261-19/+23
* vhdl-canon: free temporary nodes created for configurationTristan Gingold2023-03-261-0/+28
* vhdl: add Owned_Instance_Package_Body to handle ownershipTristan Gingold2023-03-266-243/+297
* Sem_Array_Aggregate: free subtype definitions if not used.Tristan Gingold2023-03-261-0/+19
* vhdl-canon: fix ownership on creation of configuration_declarationTristan Gingold2023-03-231-1/+1
* vhdl-std_package: declare missing wildcard typesTristan Gingold2023-03-231-0/+7
* vhdl: make instance_package_body forward_ref, adjustTristan Gingold2023-03-234-4/+5
* vhdl-sem_scopes: avoid duplicate hidden warningTristan Gingold2023-03-221-0/+5
* vhdl: generate and handle package_instantiation_bodyTristan Gingold2023-03-225-11/+108
* vhdl: add Set/Get_Immediate_Body_Flag (for package instantiation)Tristan Gingold2023-03-224-239/+42
* vhdl: add iir_kind_package_instantiation_bodyTristan Gingold2023-03-228-2/+283
* vhdl-canon(canon_declaration): now a procedure, adjustTristan Gingold2023-03-221-40/+12
* trans-chap2: improve support for nested package instantiationTristan Gingold2023-03-222-12/+28
* trans-chap7: partial rewrite of translate_implicit_array_conversionTristan Gingold2023-03-201-49/+169
* vhdl-scanner.adb: avoid a possible crashTristan Gingold2023-03-201-1/+1
* trans-chap3(is_equal_limit): also handle type_mode_e32Tristan Gingold2023-03-151-1/+2
* ghdllocal.adb(Build_Dependence): rebuild file dependencies.Tristan Gingold2023-03-135-405/+322
* vhdl: handle selected waveform assignmentTristan Gingold2023-03-093-51/+75
* trans-chap2.adb: fix a warningTristan Gingold2023-02-221-1/+0
* vhdl-sem_decls(sem_object_type_from_value): refine.Tristan Gingold2023-02-191-5/+20
* trans-chap2: elaborate dependencies of macro-expanded packages.Tristan Gingold2023-02-191-19/+38
* sem_record_aggregate: add a check for constraints. Fix #2350Tristan Gingold2023-02-131-11/+23
* vhdl-sem_lib: units during analysis can depend only on analyzed units.Tristan Gingold2023-02-111-0/+6
* synth: preliminary work for PSL endpointsTristan Gingold2023-02-081-1/+2
* trans-chap8: fix a crash while checking bounds in signal assignments.Tristan Gingold2023-02-081-1/+1
* trans-chap8: Fix individual assocs of signal parametersTristan Gingold2023-02-081-22/+44
* trans-chap8: minor reindentationTristan Gingold2023-02-081-1/+1
* synth: use same layout for records in memory as translateTristan Gingold2023-02-081-1/+1
* vhdl-canon: remove signal parameters for all-sensitized processes.Tristan Gingold2023-02-084-9/+54
* vhdl-prints: improve output of generate statementsTristan Gingold2023-02-041-12/+5
* translate: add --no-elaboration flagTristan Gingold2023-02-045-2/+10
* vhdl-sem_decls: fix a regression on subtype indication. Fix #2336Tristan Gingold2023-02-031-1/+1
* vhdl: reduce use of is_anonymous_type_definitionTristan Gingold2023-02-036-34/+40
* TBMTristan Gingold2023-02-024-12/+56
* translate: improve support for Flag_ElaborationTristan Gingold2023-02-022-2/+10
* vhdl: avoid error storms in assertionsTristan Gingold2023-02-022-2/+4
* trans-chap3: minor rewriteTristan Gingold2023-02-021-1/+1
* translate: rework translate_object_subtype_indication.Tristan Gingold2023-02-024-61/+78
* translate: add a flag to disable elaborationTristan Gingold2023-01-313-106/+125
* vhdl-prints: minor rewriteTristan Gingold2023-01-311-31/+33
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 15:38:57 +0000