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* vhdl: recognize numeric_bit.to_unsignedTristan Gingold2022-05-314-5/+57
* vhdl-nodes: move maximum/minimum out of predefined operator rangeTristan Gingold2022-05-301-27/+27
* synth-vhdl_eval: handle more operationsTristan Gingold2022-05-292-6/+9
* vhdl: recognize subprograms from std.envTristan Gingold2022-05-294-0/+98
* vhdl-canon: add Canon_Add_Suspend_StateTristan Gingold2022-05-269-197/+501
* vhdl-annotations: annotate procedure call associationsTristan Gingold2022-05-251-14/+47
* vhdl: move Is_Copyback_Parameter to vhdl-utilsTristan Gingold2022-05-252-0/+14
* synth: merge value for type_vector and type_arrayTristan Gingold2022-05-221-6/+6
* vhdl-canon: remove unused canon_flag_inertial_associationsTristan Gingold2022-05-201-4/+0
* vhdl-nodes: remove unused fields for procedure declarationsTristan Gingold2022-05-172-219/+212
* vhdl: add suspend state pseudo decl and stmt. WIP.Tristan Gingold2022-05-177-214/+264
* vhdl-canon: refactoring.Tristan Gingold2022-05-162-31/+87
* vhdl-sem_specs: use by_name assoc for port default associationTristan Gingold2022-05-161-1/+5
* trans_analyzes: add support for all processesTristan Gingold2022-05-151-85/+116
* vhdl-errors(disp_node): change message for generate bodyTristan Gingold2022-05-141-1/+1
* fix: avoid "pragma Unreferenced given" warnings with GCC 12Xiretza2022-05-141-1/+1
* fix: avoid "unnecessary with of ancestor [-gnatwr]" with GCC 12Xiretza2022-05-141-1/+1
* vhdl-canon: export extract_waveform_sensitivityTristan Gingold2022-05-121-2/+5
* trans_analyzes.adb: reindentTristan Gingold2022-05-121-3/+2
* vhdl: consider fully static record aggregates. Fix #2051Tristan Gingold2022-05-074-26/+83
* vhdl-sem.adb(are_trees_equal): handle selected element. Fix #2050Tristan Gingold2022-05-061-0/+4
* vhdl-sem_names: second fix for #2048Tristan Gingold2022-05-031-1/+2
* vhdl-sem_names(sem_selected_by_all_name): avoid a crashTristan Gingold2022-05-021-0/+4
* vhdl-sem_assocs: avoid a crash after forced analysisTristan Gingold2022-05-021-0/+5
* vhdl-annotations: do not annotate type for signal attributesTristan Gingold2022-04-291-2/+0
* vhdl-nodes: reorder, add iir_kinds_structural_statementTristan Gingold2022-04-291-9/+17
* synth: renaming (synth-static_oper -> synth-vhdl_eval)Tristan Gingold2022-04-271-5/+4
* vhdl-sem_expr: minor renamingTristan Gingold2022-04-271-3/+6
* vhdl-sem_expr: add a commentTristan Gingold2022-04-271-0/+21
* synth-static_oper: handle bit/boolean array element operationsTristan Gingold2022-04-271-3/+3
* vhdl: handle static expressions with ieee operationsTristan Gingold2022-04-262-12/+370
* vhdl: avoid a crash after errors in associations for packagesTristan Gingold2022-04-223-96/+115
* vhdl-sem_names.adb: avoid a crash on incorrect type markTristan Gingold2022-04-202-1/+12
* trans-chap2.adb: adjust owner_subtype for instantiations. Fix #2026Tristan Gingold2022-04-152-0/+39
* vhdl-sem_names(sem_check_all_sensitized): only consider interface signalTristan Gingold2022-04-152-3/+14
* synth: handle type declarations in vunit. Fix #2034Tristan Gingold2022-04-133-1/+5
* synth: add support for subtype declaration in vunits. Fix #2033Tristan Gingold2022-04-133-232/+241
* vhdl-sem.adb: adjust location of error message. Fix #2031Tristan Gingold2022-04-111-1/+1
* synth: do not add info for element subtype (except for arrays).Tristan Gingold2022-04-052-31/+22
* translate: adjust null access check: add an explicit check.Tristan Gingold2022-03-263-31/+52
* trans-chap6: add an explicit memory access during fat access deferenceTristan Gingold2022-03-251-0/+10
* grt: extract grt-vhdl_types from grt-typesTristan Gingold2022-03-221-0/+2
* vhdl-19: analyze return identifierTristan Gingold2022-03-161-0/+18
* vhdl: check access type restrictions also on completion. Fix #2006Tristan Gingold2022-03-133-25/+32
* vhdl: check association restrictions for operators. Fix #1999Tristan Gingold2022-03-113-170/+181
* vhdl-sem_names: fix a crash with select of element attribute. Fix #1992Tristan Gingold2022-03-041-1/+2
* vhdl: parse return identifier (v19)Tristan Gingold2022-03-045-210/+284
* vhdl-sem_decls: allow out/inout parameters to impure function in VHDL-2019Xiretza2022-03-011-3/+15
* vhdl-sem_types: allow methods to return file and protected types in -2019Xiretza2022-03-011-1/+3
* vhdl-sem_types: allow file and protected type access types in -2019Xiretza2022-03-011-7/+12