iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	synth: handle deferred constants. Fix #1096	Tristan Gingold	2020-01-16	1	-0/+3
*	vhdl: relax rule for choice expression staticness.	Tristan Gingold	2020-01-15	1	-0/+9
*	vhdl: recognize predefined shift operators for ieee.numeric_std. For #1077	Tristan Gingold	2020-01-11	2	-6/+39
*	synth: handle ieee.math_real.round Fix #1075	Tristan Gingold	2020-01-10	2	-0/+3
*	synth: simplify support of inertial associations.	Tristan Gingold	2020-01-09	2	-1/+5
*	vhdl/translate: handle implicit record-record conversions.	Tristan Gingold	2020-01-06	1	-12/+1
*	vhdl/translate: minor refactoring.	Tristan Gingold	2020-01-06	2	-42/+43
*	vhdl: fix multiple reference in trans-chap3.	Tristan Gingold	2020-01-06	1	-2/+6
*	vhdl/translate: handle more partially constrained array subtypes. For #1038	Tristan Gingold	2020-01-06	3	-6/+10
*	vhdl: handle untranslated subtypes for record aggregates. Fix #1051	Tristan Gingold	2020-01-02	1	-3/+12
*	vhdl: fix order of std_ulogic literals. For #1063	Tristan Gingold	2020-01-02	1	-3/+3
*	vhdl: evaluate std_logic matching equality. Fix #1063	Tristan Gingold	2020-01-01	1	-7/+50
*	vhdl: handle -gGEN=VAL for --synth. Fix #1062	Tristan Gingold	2020-01-01	3	-18/+127
*	ams-vhdl: add support for 'delayed for quantity.	Tristan Gingold	2019-12-31	9	-144/+197
*	ams-vhdl: handle zoh, ltf and ztf attributes.	Tristan Gingold	2019-12-31	12	-65/+352
*	ams-vhdl: add simultaneous null statement.	Tristan Gingold	2019-12-30	11	-155/+449
*	ams-vhdl: add frequency function, minor fixes.	Tristan Gingold	2019-12-30	6	-6/+26
*	ams-vhdl: handle record nature end name.	Tristan Gingold	2019-12-30	2	-0/+5
*	ams-vhdl: improve error recovery	Tristan Gingold	2019-12-30	6	-61/+92
*	ams-vhdl: analyze, canon and print simultaneous procedural statements.	Tristan Gingold	2019-12-30	6	-90/+175
*	ams-vhdl: fix tree consistency for terminal declaration.	Tristan Gingold	2019-12-30	2	-3/+3
*	ams-vhdl: correctly test and set staticness of dot/integ attributes.	Tristan Gingold	2019-12-30	1	-8/+7
*	ams-vhdl: print subnature declarations.	Tristan Gingold	2019-12-30	1	-1/+16
*	ams-vhdl: check nature for record natures and terminals.	Tristan Gingold	2019-12-30	7	-231/+397
*	vhdl-ams: fix tree consistency for subnature declaration.	Tristan Gingold	2019-12-29	4	-9/+9
*	vhdl-ams: fix overload for simple simultaneous statement.	Tristan Gingold	2019-12-29	3	-4/+26
*	vhdl: improve support of AMS-vhdl (array and record natures, source quantities)	Tristan Gingold	2019-12-28	34	-1058/+5972
*	vhdl: add Has_Delay_Machanism for optional 'inertial' printing.	Tristan Gingold	2019-12-26	6	-93/+165
*	vhdl-prints: subtype indication is optional in object alias.	Tristan Gingold	2019-12-26	1	-3/+2
*	vhdl: handle non-object aliases in selected use clause. Fix #1057	Tristan Gingold	2019-12-24	1	-5/+8
*	vhdl: recognize ieee.std_logic_1164.is_x.	Tristan Gingold	2019-12-24	2	-0/+9
*	synth: support multiple synthesis.	Tristan Gingold	2019-12-02	2	-0/+33
*	vhdl: recognize sin and cos from math_real.	Tristan Gingold	2019-11-26	2	-0/+6
*	vhdl: recognize intrinsic procedures in vhdl-sem_specs.	Tristan Gingold	2019-11-23	2	-25/+51
*	synth: preliminary work to support intrinsic procedures.	Tristan Gingold	2019-11-14	2	-0/+26
*	synth: file support (WIP).	Tristan Gingold	2019-11-12	1	-1/+2
*	synth: initial support for file types. For #1004	Tristan Gingold	2019-11-11	1	-27/+33
*	synth: initial support of access type. For #1004	Tristan Gingold	2019-11-11	1	-0/+4
*	vhdl-ieee-std_logic_1164: minor simplification.	Tristan Gingold	2019-11-06	1	-21/+8
*	synth: handle edge operators in synth_predefined_function_call.	Tristan Gingold	2019-11-06	2	-5/+4
*	vhdl: recognize rising_edge/falling_edge.	Tristan Gingold	2019-11-06	2	-6/+15
*	vhdl-scanner: handle 'synopsys' pragma.	Tristan Gingold	2019-11-04	1	-1/+2
*	vhdl-prints: handle more constructs in psl vunit.	Tristan Gingold	2019-10-31	1	-0/+5
*	vhdl: allow attributes in vunit declarations.	Tristan Gingold	2019-10-30	6	-200/+216
*	synth: handle concurrent signal assignment in vunits.	Tristan Gingold	2019-10-25	1	-0/+2
*	vhdl-canon: handle simple signal assignment in vunits.	Tristan Gingold	2019-10-25	1	-273/+272
*	vhdl-canon: extract canon_concurrent_label.	Tristan Gingold	2019-10-25	1	-20/+25
*	vhdl-annotations: extract annotate_concurrent_statement.	Tristan Gingold	2019-10-25	1	-47/+53
*	vhdl-annotations: minor renaming.	Tristan Gingold	2019-10-25	1	-8/+8
*	vhdl: extract sem_concurrent_statement, to handle hdl stmt in vunits.	Tristan Gingold	2019-10-25	4	-119/+122