iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	vhdl-prints: fix extra 'else' in disp_conditional_waveform.	Tristan Gingold	2019-06-03	1	-2/+3
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*	vhdl-formatters: Use vstrings to format into a string.	Tristan Gingold	2019-06-03	2	-25/+134
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*	vhdl-prints: improve indent.	Tristan Gingold	2019-06-02	1	-0/+4
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*	vhdl-prints: improve output for if/then, architecture.	Tristan Gingold	2019-06-01	1	-0/+4
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*	grt: extract grt.to_strings from grt.images	Tristan Gingold	2019-06-01	1	-9/+10
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*	vhdl-formatters: add indent.	Tristan Gingold	2019-06-01	3	-28/+224
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*	vhdl: add code formatter (WIP)	Tristan Gingold	2019-05-30	2	-0/+279
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*	vhdl: differenciate block and line comments.	Tristan Gingold	2019-05-30	6	-185/+195
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*	vhdl-prints: handle PSL, add psl tokens for strong and inclusive variants.	Tristan Gingold	2019-05-30	3	-85/+412
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*	vhdl: renames disp_vhdl to prints	Tristan Gingold	2019-05-30	11	-83/+88
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*	vhdl-disp_vhdl: minor improvements on the output.	Tristan Gingold	2019-05-30	2	-68/+114
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*	vhdl-disp_vhdl: print literals and identifiers from the source.	Tristan Gingold	2019-05-29	10	-586/+738
\| \| \| \|	Add Literal_Length and set it in the parser.
*	trans-chap8: reverse_range returns false for is_for_loop_iterator_stable.	Tristan Gingold	2019-05-28	1	-20/+23
\| \| \| \|	Fix #828
*	vhdl: time resolution is fs for auto in vhdl 87	Tristan Gingold	2019-05-28	1	-0/+6
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*	vhdl-sem_names: check time resoultion for standalone units.	Tristan Gingold	2019-05-28	1	-0/+10
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*	vhdl: get rid of Get/Set_Physical_Unit.	Tristan Gingold	2019-05-28	10	-471/+402
\| \| \| \|	Use integer_literal for evaluated physical literals.
*	vhdl-sem_stmts.adb: minor refactoring.	Tristan Gingold	2019-05-28	1	-1/+1
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*	vhdl-disp_vhdl: refactoring.	Tristan Gingold	2019-05-25	1	-7/+5
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*	vhdl: move Current_Text from vhdl-utils to vhdl-parse.	Tristan Gingold	2019-05-25	3	-28/+23
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*	vhdl-disp_vhdl: minor refactoring.	Tristan Gingold	2019-05-25	1	-8/+5
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*	vhdl-disp_vhdl: fixes for psl.	Tristan Gingold	2019-05-25	1	-2/+2
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*	vhdl-disp_vhdl: reworked, use a token based printer.	Tristan Gingold	2019-05-24	2	-1741/+2184
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*	vhdl: update AMS parsing.	Tristan Gingold	2019-05-24	3	-173/+195
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*	psl: can keep parenthesis during parse.	Tristan Gingold	2019-05-24	2	-31/+105
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*	vhdl-parse: Add Has_Is for block_statement.	Tristan Gingold	2019-05-24	3	-1/+7
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*	vhdl-parse: minor changes for disp_vhdl.	Tristan Gingold	2019-05-24	1	-0/+5
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*	vhdl/simulate: ignore some constructs for synthesis.	Tristan Gingold	2019-05-23	2	-3/+5
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*	trans-chap3: improve style.	Tristan Gingold	2019-05-23	1	-3/+2
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*	vhdl-nodes: make subtype_Definition like the others.	Tristan Gingold	2019-05-23	2	-201/+209
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*	vhdl: add hook on free_node, automatically free	Tristan Gingold	2019-05-22	7	-29/+112
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*	python: regenerate elocations.py	Tristan Gingold	2019-05-22	2	-31/+31
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*	vhdl-utils: avoid a crash on architecture without name.	Tristan Gingold	2019-05-21	1	-0/+2
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*	python: regenerated nodes.py	Tristan Gingold	2019-05-21	1	-0/+1
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*	python: add Flag_Force_Analysis in flags.py	Tristan Gingold	2019-05-21	1	-1/+6
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*	errorout-memory: handle message groups; adjust python	Tristan Gingold	2019-05-21	3	-24/+17
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*	vhdl: properly group messages for overloading error.	Tristan Gingold	2019-05-21	2	-2/+24
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*	libghdl: fix various issues.	Tristan Gingold	2019-05-20	6	-175/+180
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*	Add simple_IO - to be used instead of Text_IO.	Tristan Gingold	2019-05-19	11	-67/+53
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*	trans-chap8: handle unbounded records in trans_actual. Fix #788	Tristan Gingold	2019-05-15	1	-1/+1
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*	vhdl-parse: strenghten.	Tristan Gingold	2019-05-15	1	-9/+13
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*	python/libghdl: refactoring	Tristan Gingold	2019-05-14	26	-315/+5135
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*	python: adjust after renaming.	Tristan Gingold	2019-05-14	2	-11/+11
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*	errorout: add messages group instead of continuation.	Tristan Gingold	2019-05-12	15	-130/+165
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*	vhdl-nodes: fix minor typo.	Tristan Gingold	2019-05-11	2	-55/+51
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*	vhdl-parse: improve error messages. Fix #818	Tristan Gingold	2019-05-11	1	-0/+14
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*	vhdl: adjust aggregate staticness if not constrained. Fix #817	Tristan Gingold	2019-05-11	1	-0/+6
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*	vhdl: minor reformating.	Tristan Gingold	2019-05-11	2	-5/+4
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*	vhdl: add missing location.	Tristan Gingold	2019-05-11	1	-0/+1
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*	vhdl: decouple errorouts a bit more.	Tristan Gingold	2019-05-10	11	-52/+81
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*	psl: add psl-types, psl-nodes_priv.	Tristan Gingold	2019-05-10	15	-2/+15
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