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* psl, vhdl: Extend semantic pass for PSL to allow "assert never <Sequence>" wi...Ondrej Ille2021-03-282-0/+11
* psl-subsets.adb: allow optionnal sequence to plus repeat. Fix #1698Tristan Gingold2021-03-271-3/+2
* ghdlsynth.adb: also allow .psl files without any warningTristan Gingold2021-03-272-6/+13
* synth: expand ports for record. Fix #1675Tristan Gingold2021-03-273-65/+270
* src: Move --psl-report-uncovered to run options, not analysis options.Ondrej Ille2021-03-224-3/+12
* Revert "src: Add -Wpsl-uncovered option to optionally warn about uncovered PS...Ondrej Ille2021-03-224-31/+17
* Revert "src: Fix build warning for redundant comparison."Ondrej Ille2021-03-221-1/+1
* Revert "src: Fix notes on pull-request."Ondrej Ille2021-03-223-9/+10
* src: Fix notes on pull-request.Ondrej Ille2021-03-223-10/+9
* src: Fix build warning for redundant comparison.Ondrej Ille2021-03-221-1/+1
* src: Add -Wpsl-uncovered option to optionally warn about uncovered PSL sequen...Ondrej Ille2021-03-224-17/+31
* vhdl-sem_types: fix staticness of constrained array. For #1689Tristan Gingold2021-03-211-7/+10
* vhdl: make standard.now impure for vhdl 2008. Fix #1691Tristan Gingold2021-03-201-5/+11
* vhdl: handle alias of protected objects. Fix #1688Tristan Gingold2021-03-192-8/+23
* netlists-dump: also dump attributesTristan Gingold2021-03-173-74/+168
* synth: handle loc attribute (for ports). Fix #1682Tristan Gingold2021-03-172-1/+5
* netlists: do not remove net gates that have an attributeTristan Gingold2021-03-173-25/+36
* std_names: add Name_LocTristan Gingold2021-03-172-1/+3
* synth-expr.adb: add commentsTristan Gingold2021-03-141-0/+5
* synth-expr.adb: handle const right in synth_short_circuit. Fix #1685Tristan Gingold2021-03-141-0/+6
* vhdl-canon.adb: handle individual assoc in extract sensitivity. Fix #1684Tristan Gingold2021-03-131-0/+2
* synth-oper: handle const for numeric_std.match Fix #1679Tristan Gingold2021-03-131-0/+1
* synth-expr: allow non-simple name for FF clocks. Fix #1681Tristan Gingold2021-03-131-12/+17
* synth: handle attributes of length 0. Fix #1680Tristan Gingold2021-03-132-3/+6
* Add a warning for processes without a wait statement. Fix #1677Tristan Gingold2021-03-082-7/+17
* ghdlvpi.adb: use Directory_Separator.Tristan Gingold2021-03-071-1/+3
* Include directory structure proposal.Michał Kruszewski2021-03-073-2/+2
* VHPI: add initial minimal implementationMarlon James2021-03-0413-21/+3209
* VPI: support loading multiple librariesMarlon James2021-03-021-13/+51
* synth: handle pow and arctan from ieee.math_real. Fix #1665Tristan Gingold2021-02-275-6/+30
* vhdl-sem_expr.adb: improve fix for #1664Tristan Gingold2021-02-271-4/+1
* vhdl-nodes.ads: add a commentTristan Gingold2021-02-271-0/+2
* vhdl-sem_expr: detect incorrect condition for vhdl08. Fix #1664Tristan Gingold2021-02-271-0/+3
* synth-stmts: handle attributes in block and generate statements. Fix #1658Tristan Gingold2021-02-211-0/+5
* std_names: add async_abort and sync_abort. For #1654Tristan Gingold2021-02-213-36/+40
* vhdl-canon.adb: add a missing check on generic associations. Fix #1655Tristan Gingold2021-02-201-0/+3
* vhdl-nodes.ads: reorder fields of block_configuration to match grammarTristan Gingold2021-02-202-7/+7
* ghdlsynth.adb: unknown vendor library is now an error. Fix #1650Tristan Gingold2021-02-191-1/+6
* grt-signals.adb: fix access. Fix #1652Tristan Gingold2021-02-181-1/+1
* Makefile: put libraries in lib/. For #1642Tristan Gingold2021-02-131-2/+1
* synth-expr: compute signess for range array attributes. Fix #1645Tristan Gingold2021-02-123-17/+9
* vhdl-evaluation.adb: use is_overflow_literal.Tristan Gingold2021-02-112-13/+21
* vhdl-sem_expr: avoid duplicate error messages for overflow in rangeTristan Gingold2021-02-111-4/+1
* vhdl-evaluation: factorize codeTristan Gingold2021-02-111-7/+5
* eval_is_range_in_bound: avoid crash in case of overflow. Fix #1640Tristan Gingold2021-02-111-2/+12
* pyGHDL: automatically format generated files with blackXiretza2021-02-101-0/+6
* vhdl-sem_stmts: avoid overflow. Fix #1639Tristan Gingold2021-02-101-3/+13
* vhdl-evaluation: minor simplificationTristan Gingold2021-02-101-3/+1
* vhdl-sem_psl: factorize code for onehot/onehot0 and stable/fell/rose.Tristan Gingold2021-02-093-105/+17
* netlists-folds: add commentsTristan Gingold2021-02-091-0/+4
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