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* vhdl-disp_vhdl: fixes for psl.Tristan Gingold2019-05-252-4/+18
* vhdl-disp_vhdl: reworked, use a token based printer.Tristan Gingold2019-05-242-1741/+2184
* vhdl: update AMS parsing.Tristan Gingold2019-05-243-173/+195
* psl: can keep parenthesis during parse.Tristan Gingold2019-05-247-63/+179
* vhdl-parse: Add Has_Is for block_statement.Tristan Gingold2019-05-243-1/+7
* vhdl-parse: minor changes for disp_vhdl.Tristan Gingold2019-05-241-0/+5
* vhdl/simulate: ignore some constructs for synthesis.Tristan Gingold2019-05-232-3/+5
* trans-chap3: improve style.Tristan Gingold2019-05-231-3/+2
* vhdl-nodes: make subtype_Definition like the others.Tristan Gingold2019-05-232-201/+209
* ghdlprint: exit in case of error.Tristan Gingold2019-05-231-2/+4
* ghdlprint: add --no-sem to --reprintTristan Gingold2019-05-221-9/+33
* vhdl: add hook on free_node, automatically freeTristan Gingold2019-05-227-29/+112
* python: regenerate elocations.pyTristan Gingold2019-05-222-31/+31
* synth: use only one edge gate, make it fully abstract. Handle falling_edge.Tristan Gingold2019-05-225-35/+34
* synth: add disp_vhdl.Tristan Gingold2019-05-213-2/+269
* vhdl-utils: avoid a crash on architecture without name.Tristan Gingold2019-05-211-0/+2
* python: regenerated nodes.pyTristan Gingold2019-05-211-0/+1
* python: add Flag_Force_Analysis in flags.pyTristan Gingold2019-05-211-1/+6
* errorout-memory: handle message groups; adjust pythonTristan Gingold2019-05-215-30/+76
* vhdl: properly group messages for overloading error.Tristan Gingold2019-05-213-3/+25
* libghdl: fix various issues.Tristan Gingold2019-05-206-175/+180
* ghdldrv: use Dyn_Table instead of the GNAT package.Tristan Gingold2019-05-191-8/+6
* Add simple_IO - to be used instead of Text_IO.Tristan Gingold2019-05-1925-171/+228
* edit: add copyright headers.Tristan Gingold2019-05-1914-2/+252
* ortho: move llvm to llvm35Tristan Gingold2019-05-1621-3/+3
* trans-chap8: handle unbounded records in trans_actual. Fix #788Tristan Gingold2019-05-151-1/+1
* Add edif parser.Tristan Gingold2019-05-1519-0/+5147
* vhdl-parse: strenghten.Tristan Gingold2019-05-151-9/+13
* python/libghdl: refactoringTristan Gingold2019-05-1426-315/+5135
* python: adjust after renaming.Tristan Gingold2019-05-142-11/+11
* errorout: make it more neutral.Tristan Gingold2019-05-132-33/+41
* options: support -Werror=WARN to transform one warning into an error.Tristan Gingold2019-05-134-14/+36
* errorout-console: detect terminal during setup.Tristan Gingold2019-05-131-2/+2
* errorout: add messages group instead of continuation.Tristan Gingold2019-05-1220-169/+261
* files_map: add location_to_coord.Tristan Gingold2019-05-112-8/+23
* types: add fp32Tristan Gingold2019-05-111-0/+1
* pnodes.py: strengthenTristan Gingold2019-05-111-1/+8
* vhdl-nodes: fix minor typo.Tristan Gingold2019-05-112-55/+51
* names: add more sv names.Tristan Gingold2019-05-112-40/+81
* vhdl-parse: improve error messages. Fix #818Tristan Gingold2019-05-111-0/+14
* vhdl: adjust aggregate staticness if not constrained. Fix #817Tristan Gingold2019-05-111-0/+6
* vhdl: minor reformating.Tristan Gingold2019-05-112-5/+4
* vhdl: add missing location.Tristan Gingold2019-05-111-0/+1
* vhdl: decouple errorouts a bit more.Tristan Gingold2019-05-1020-120/+116
* psl: add psl-types, psl-nodes_priv.Tristan Gingold2019-05-1033-13/+91
* vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.Tristan Gingold2019-05-1035-313/+310
* Extract psl-errors from errorout.Tristan Gingold2019-05-1012-39/+71
* Move errorout from vhdl/ to src/Tristan Gingold2019-05-102-2/+2
* Move errorout from vhdl/ to src/Tristan Gingold2019-05-096-0/+0
* Make lists a generic package, add vhdl-lists.Tristan Gingold2019-05-097-17/+39
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