blob: d4807195d319e6fa6f60801d684834d20aa52a3d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
|
library ieee;
use ieee.std_logic_1164.all;
entity repro2 is
port (p : inout std_logic_vector (3 downto 0));
end repro2;
architecture behav of repro2 is
alias p_0 is p(0);
begin
p_0 <= '0' after 1 ns, '1' after 4 ns;
end behav;
|