1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
|
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
-- vim: tabstop=2:shiftwidth=2:noexpandtab
-- kate: tab-width 2; replace-tabs off; indent-width 2;
--
-- =============================================================================
-- Testbench: Simulation constants, functions and utilities.
--
-- Authors: Patrick Lehmann
-- Thomas B. Preusser
--
-- Description:
-- ------------------------------------
-- TODO
--
-- License:
-- =============================================================================
-- Copyright 2007-2014 Technische Universitaet Dresden - Germany
-- Chair for VLSI-Design, Diagnostics and Architecture
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
-- =============================================================================
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
package simulation is
--+ Test Bench Status Management ++++++++++++++++++++++++++++++++++++++++++
--* The testbench is marked as failed. If a message is provided, it is
--* reported as an error.
procedure tbFail(msg : in string := "");
--* If the passed condition has evaluated false, the testbench is marked
--* as failed. In this case, the optional message will be reported as an
--* an error if one was provided.
procedure tbAssert(cond : in boolean; msg : in string := "");
--* Prints out the overall testbench result as defined by the automated
--* testbench process. Unless tbFail() or tbAssert() with a false condition
--* have been called before, a successful completion will be reported, a
--* failure otherwise.
procedure tbPrintResult;
-- TODO: integrate VCD simulation functions and procedures from sim_value_change_dump.vhdl here
-- checksum functions
-- ===========================================================================
-- TODO: move checksum functions here
end;
use std.TextIO.all;
package body simulation is
--+ Test Bench Status Management ++++++++++++++++++++++++++++++++++++++++++
--* Internal state variable to log a failure condition for final reporting.
--* Once de-asserted, this variable will never return to a value of true.
shared variable pass : boolean := true;
procedure tbFail(msg : in string := "") is
begin
if msg'length > 0 then
report msg severity error;
end if;
pass := false;
end;
procedure tbAssert(cond : in boolean; msg : in string := "") is
begin
if not cond then
tbFail(msg);
end if;
end;
procedure tbPrintResult is
variable l : line;
begin
write(l, string'("SIMULATION RESULT = "));
if pass then
write(l, string'("PASSED"));
else
write(l, string'("FAILED"));
end if;
writeline(output, l);
end procedure;
-- checksum functions
-- ===========================================================================
end package body;
|
