Progress in icetime

3 files changed, 296 insertions, 23 deletions

diff --git a/icetime/cells.v b/icetime/cells.v
index 289c55e..32ee1a7 100644
--- a/icetime/cells.v
+++ b/icetime/cells.v
@@ -672,6 +672,186 @@ module sync_clk_enable(D, NC, Q);
   output Q;
 endmodule
 
+module Span4Mux_h0(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span4Mux_h1(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span4Mux_h2(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span4Mux_h3(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span4Mux_h4(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span4Mux_v0(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span4Mux_v1(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span4Mux_v2(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span4Mux_v3(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span4Mux_v4(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h0(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h1(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h2(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h3(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h4(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h5(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h6(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h7(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h8(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h9(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h10(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h11(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_h12(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v0(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v1(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v2(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v3(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v4(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v5(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v6(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v7(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v8(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v9(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v10(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v11(I, O);
+  input I;
+  output O;
+endmodule
+
+module Span12Mux_v12(I, O);
+  input I;
+  output O;
+endmodule
+
 module GND(Y);
   output Y;
 endmodule
diff --git a/icetime/icetime.cc b/icetime/icetime.cc
index e21dafc..74426d0 100644
--- a/icetime/icetime.cc
+++ b/icetime/icetime.cc
@@ -50,11 +50,13 @@ std::set<int> used_nets;
 
 std::set<net_segment_t> interconn_src, interconn_dst;
 std::set<int> no_interconn_net;
+int iconn_cell_cnt = 0;
 
 // netlist_cells[cell_name][port_name] = port_expr
 std::map<std::string, std::map<std::string, std::string>> netlist_cells;
 std::map<std::string, std::string> netlist_cell_types;
 
+std::set<std::string> extra_wires;
 std::vector<std::string> extra_vlog;
 std::set<int> declared_nets;
 
@@ -106,6 +108,15 @@ std::string net_name(int net)
 	return stringf("net_%d", net);
 }
 
+std::string seg_name(const net_segment_t &seg)
+{
+	std::string str = stringf("seg_%d_%d_%s_%d", seg.x, seg.y, seg.name.c_str(), seg.net);
+	for (auto &ch : str)
+		if (ch == '/') ch = '_';
+	extra_wires.insert(str);
+	return str;
+}
+
 void read_pcf(const char *filename)
 {
 	FILE *f = fopen(filename, "r");
@@ -514,7 +525,7 @@ struct make_interconn_worker_t
 	std::map<int, std::set<int>> net_tree;
 	std::map<net_segment_t, std::set<net_segment_t>> seg_tree;
 	std::map<net_segment_t, net_segment_t> seg_parents;
-	std::set<net_segment_t> target_segs;
+	std::set<net_segment_t> target_segs, handled_segs;
 
 	void build_net_tree(int src)
 	{
@@ -617,35 +628,59 @@ struct make_interconn_worker_t
 
 	void create_cells(const net_segment_t &trg)
 	{
-		if (seg_parents.count(trg) == 0)
+		if (handled_segs.count(trg))
+			return;
+
+		handled_segs.insert(trg);
+
+		if (seg_parents.count(trg) == 0) {
+			extra_vlog.push_back(stringf("  assign %s = %s;\n", seg_name(trg).c_str(), net_name(trg.net).c_str()));
 			return;
+		}
 
 		const net_segment_t *cursor = &seg_parents.at(trg);
 
+		// Local Mux
+
 		if (trg.name.substr(0, 6) == "local_")
 		{
-			extra_vlog.push_back(stringf("  LocalMux conn_%d_%d (.I(%s), .O(%s));\n",
-					cursor->net, trg.net, net_name(cursor->net).c_str(), net_name(trg.net).c_str()));
-
-			declared_nets.insert(cursor->net);
-			create_cells(*cursor);
-			return;
+			extra_vlog.push_back(stringf("  LocalMux conn_%d (.I(%s), .O(%s));\n",
+					iconn_cell_cnt++, seg_name(*cursor).c_str(), seg_name(trg).c_str()));
+			goto continue_at_cursor;
 		}
 
-		if (trg.name.substr(0, 6) == "span4_")
+		// Span4Mux
+
+		if (trg.name.substr(0, 6) == "span4_" || trg.name.substr(0, 4) == "sp4_")
 		{
-			while (seg_parents.count(*cursor) && cursor->net == trg.net)
+			bool non_io = trg.name.substr(0, 4) == "sp4_";
+			bool horiz_non_io = trg.name.substr(0, 6) == "sp4_h_";
+			int count_length = -1;
+
+			while (seg_parents.count(*cursor) && cursor->net == trg.net) {
+				non_io = non_io || (cursor->name.substr(0, 4) == "sp4_");
+				horiz_non_io = horiz_non_io || (cursor->name.substr(0, 6) == "sp4_h_");
 				cursor = &seg_parents.at(*cursor);
+				count_length++;
+			}
 
 			if (cursor->net == trg.net)
-				return;
+				goto skip_to_cursor;
 
-			extra_vlog.push_back(stringf("  IoSpan4Mux conn_%d_%d (.I(%s), .O(%s));\n",
-					cursor->net, trg.net, net_name(cursor->net).c_str(), net_name(trg.net).c_str()));
+			if (cursor->name.substr(0, 7) == "span12_" || cursor->name.substr(0, 5) == "sp12_") {
+				extra_vlog.push_back(stringf("  Sp12to4 conn_%d (.I(%s), .O(%s));\n",
+						iconn_cell_cnt++, seg_name(*cursor).c_str(), seg_name(trg).c_str()));
+			} else
+			if (non_io) {
+				extra_vlog.push_back(stringf("  Span4Mux_%c%d conn_%d (.I(%s), .O(%s));\n",
+						horiz_non_io ? 'h' : 'v', count_length, iconn_cell_cnt++,
+						seg_name(*cursor).c_str(), seg_name(trg).c_str()));
+			} else {
+				extra_vlog.push_back(stringf("  IoSpan4Mux conn_%d (.I(%s), .O(%s));\n",
+						iconn_cell_cnt++, seg_name(*cursor).c_str(), seg_name(trg).c_str()));
+			}
 
-			declared_nets.insert(cursor->net);
-			create_cells(*cursor);
-			return;
+			goto continue_at_cursor;
 		}
 
 		// Default handler
@@ -654,11 +689,16 @@ struct make_interconn_worker_t
 			cursor = &seg_parents.at(*cursor);
 
 		if (cursor->net == trg.net)
-			return;
+			goto skip_to_cursor;
+
+		extra_vlog.push_back(stringf("  INTERCONN conn_%d (.I(%s), .O(%s));\n",
+				iconn_cell_cnt++, seg_name(*cursor).c_str(), seg_name(trg).c_str()));
+		goto continue_at_cursor;
 
-		extra_vlog.push_back(stringf("  INTERCONN conn_%d_%d (.I(%s), .O(%s));\n",
-				cursor->net, trg.net, net_name(cursor->net).c_str(), net_name(trg.net).c_str()));
-		declared_nets.insert(cursor->net);
+	skip_to_cursor:
+		extra_vlog.push_back(stringf("  assign %s = %s;\n", seg_name(trg).c_str(), seg_name(*cursor).c_str()));
+	continue_at_cursor:
+		create_cells(*cursor);
 	}
 };
 
@@ -686,8 +726,10 @@ void make_interconn(const net_segment_t &src)
 	print_seg_tree(src, 2, false);
 #endif
 
-	for (auto &seg : worker.target_segs)
+	for (auto &seg : worker.target_segs) {
+		extra_vlog.push_back(stringf("  assign %s = %s;\n", net_name(seg.net).c_str(), seg_name(seg).c_str()));
 		worker.create_cells(seg);
+	}
 }
 
 void help(const char *cmd)
@@ -767,6 +809,9 @@ int main(int argc, char **argv)
 	for (int net : declared_nets)
 		fprintf(fout, "  wire net_%d;\n", net);
 
+	for (auto net : extra_wires)
+		fprintf(fout, "  wire %s;\n", net.c_str());
+
 	for (auto &str : extra_vlog)
 		fprintf(fout, "%s", str.c_str());
 
diff --git a/icetime/mktest.py b/icetime/mktest.py
index 04a1cfd..ba71c83 100644
--- a/icetime/mktest.py
+++ b/icetime/mktest.py
@@ -30,14 +30,62 @@ with open("%s.ys" % sys.argv[1], "w") as f:
     print("prep", file=f)
     print("equiv_make top chip equiv", file=f)
     print("hierarchy -top equiv", file=f)
+    print("rename -hide w:N_*", file=f)
     print("equiv_struct", file=f)
-    print("equiv_purge", file=f)
+    print("# equiv_purge", file=f)
     print("opt_clean -purge", file=f)
     print("show -format dot -prefix %s" % sys.argv[1], file=f)
 
 os.system("bash ../icefuzz/icecube.sh %s.v" % sys.argv[1])
 os.rename("%s.v" % sys.argv[1], "%s_in.v" % sys.argv[1])
-os.system("grep -v defparam %s.vsb > %s_ref.v" % (sys.argv[1], sys.argv[1]))
+
+with open("%s_ref.v" % sys.argv[1], "w") as f:
+    for line in open("%s.vsb" % sys.argv[1], "r"):
+        if line.find("defparam") >= 0:
+            continue
+
+        line = line.replace(" Span4Mux_s0_h ",   " Span4Mux_h0 ")
+        line = line.replace(" Span4Mux_s1_h ",   " Span4Mux_h1 ")
+        line = line.replace(" Span4Mux_s2_h ",   " Span4Mux_h2 ")
+        line = line.replace(" Span4Mux_s3_h ",   " Span4Mux_h3 ")
+        line = line.replace(" Span4Mux_h ",      " Span4Mux_h4 ")
+
+        line = line.replace(" Span4Mux_s0_v ",   " Span4Mux_v0 ")
+        line = line.replace(" Span4Mux_s1_v ",   " Span4Mux_v1 ")
+        line = line.replace(" Span4Mux_s2_v ",   " Span4Mux_v2 ")
+        line = line.replace(" Span4Mux_s3_v ",   " Span4Mux_v3 ")
+        line = line.replace(" Span4Mux_v ",      " Span4Mux_v4 ")
+        line = line.replace(" Span4Mux ",        " Span4Mux_v4 ")
+
+        line = line.replace(" Span12Mux_s0_h ",  " Span12Mux_h0 ")
+        line = line.replace(" Span12Mux_s1_h ",  " Span12Mux_h1 ")
+        line = line.replace(" Span12Mux_s2_h ",  " Span12Mux_h2 ")
+        line = line.replace(" Span12Mux_s3_h ",  " Span12Mux_h3 ")
+        line = line.replace(" Span12Mux_s4_h ",  " Span12Mux_h4 ")
+        line = line.replace(" Span12Mux_s5_h ",  " Span12Mux_h5 ")
+        line = line.replace(" Span12Mux_s6_h ",  " Span12Mux_h6 ")
+        line = line.replace(" Span12Mux_s7_h ",  " Span12Mux_h7 ")
+        line = line.replace(" Span12Mux_s8_h ",  " Span12Mux_h8 ")
+        line = line.replace(" Span12Mux_s9_h ",  " Span12Mux_h9 ")
+        line = line.replace(" Span12Mux_s10_h ", " Span12Mux_h10 ")
+        line = line.replace(" Span12Mux_s11_h ", " Span12Mux_h11 ")
+        line = line.replace(" Span12Mux ",       " Span12Mux_h12 ")
+
+        line = line.replace(" Span12Mux_s0_v ",  " Span12Mux_v0 ")
+        line = line.replace(" Span12Mux_s1_v ",  " Span12Mux_v1 ")
+        line = line.replace(" Span12Mux_s2_v ",  " Span12Mux_v2 ")
+        line = line.replace(" Span12Mux_s3_v ",  " Span12Mux_v3 ")
+        line = line.replace(" Span12Mux_s4_v ",  " Span12Mux_v4 ")
+        line = line.replace(" Span12Mux_s5_v ",  " Span12Mux_v5 ")
+        line = line.replace(" Span12Mux_s6_v ",  " Span12Mux_v6 ")
+        line = line.replace(" Span12Mux_s7_v ",  " Span12Mux_v7 ")
+        line = line.replace(" Span12Mux_s8_v ",  " Span12Mux_v8 ")
+        line = line.replace(" Span12Mux_s9_v ",  " Span12Mux_v9 ")
+        line = line.replace(" Span12Mux_s10_v ", " Span12Mux_v10 ")
+        line = line.replace(" Span12Mux_s11_v ", " Span12Mux_v11 ")
+        line = line.replace(" Span12Mux_v ",     " Span12Mux_v12 ")
+
+        f.write(line)
 
 os.remove("%s.bin" % sys.argv[1])
 os.remove("%s.vsb" % sys.argv[1])