aboutsummaryrefslogtreecommitdiffstats
path: root/docs
diff options
context:
space:
mode:
authorClifford Wolf <clifford@clifford.at>2017-03-19 14:04:29 +0100
committerClifford Wolf <clifford@clifford.at>2017-03-19 14:04:29 +0100
commitbb42a74f90e66a592c1f1df631f02bfa5f37438e (patch)
tree2c9bcbe076da5f67d083ac8842acf3c169dce0d6 /docs
parent3eb2bf12bff058bc8fe83db661b0b3fd1b35dffa (diff)
downloadicestorm-bb42a74f90e66a592c1f1df631f02bfa5f37438e.tar.gz
icestorm-bb42a74f90e66a592c1f1df631f02bfa5f37438e.tar.bz2
icestorm-bb42a74f90e66a592c1f1df631f02bfa5f37438e.zip
Fix 32c3 video link in docs
Diffstat (limited to 'docs')
-rw-r--r--docs/index.html2
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/index.html b/docs/index.html
index ac46edd..ebf424d 100644
--- a/docs/index.html
+++ b/docs/index.html
@@ -520,7 +520,7 @@ Links to related projects. Contact me at clifford@clifford.at if you have an int
<h3>Lectures and Tutorials</h3>
<ul>
-<li><a href="https://www.youtube.com/watch?v=9rYiGDDUIzg">A Free and Open Source Verilog-to-Bitstream Flow for iCE40 FPGAs [32c3]</a>
+<li><a href="https://media.ccc.de/v/32c3-7139-a_free_and_open_source_verilog-to-bitstream_flow_for_ice40_fpgas">A Free and Open Source Verilog-to-Bitstream Flow for iCE40 FPGAs [32c3]</a>
<li><a href="https://www.youtube.com/watch?v=s7fNTF8nd8A">Synthesizing Verilog for Lattice ICE40 FPGAs (Paul Martin)</a>
<li><a href="https://github.com/Obijuan/open-fpga-verilog-tutorial/wiki">A Spanish FPGA Tutorial using IceStorm</a>
</ul>