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authorClifford Wolf <clifford@clifford.at>2015-09-11 11:24:23 +0200
committerClifford Wolf <clifford@clifford.at>2015-09-11 11:24:23 +0200
commitc6f1e1f48df1240b5d12fed1f276722ddb7c13f0 (patch)
treec3d976e7674b60e68097dd4a33a357d420de1592 /docs
parent9addea6cb96ff0167a1539b4429a8aa6184c5d6a (diff)
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fixed docs typo
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diff --git a/docs/io_tile.html b/docs/io_tile.html
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@@ -103,7 +103,7 @@ For example the signal <tt>io_1/D_IN_0</tt> in IO tile (0, 5) can be seen as <tt
<p>
Each IO Tile has 2 <tt>NegClk</tt> configuration bits, suggesting that the
clock signals can be inverted independently for the the two IO blocks in the
-tile. However, the Lattice tools refuse to pack to IO blocks with different block
+tile. However, the Lattice tools refuse to pack two IO blocks with different clock
polarity into the same IO tile. In our tests we only managed to either set or clear
both NegClk bits.
</p>