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| author | Larry Doolittle <ldoolitt@recycle.lbl.gov> | 2015-10-12 21:45:43 -0700 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-10-13 11:07:23 +0200 |
| commit | f1e096480ac704ee1845b129ad7baadea78742fc (patch) | |
| tree | e5aec7928ab94d1f5cc5f95a7d99445c50404442 /docs | |
| parent | 11c95920d2c3936a4965b51e78b0258d8d2bfa8f (diff) | |
| download | icestorm-f1e096480ac704ee1845b129ad7baadea78742fc.tar.gz icestorm-f1e096480ac704ee1845b129ad7baadea78742fc.tar.bz2 icestorm-f1e096480ac704ee1845b129ad7baadea78742fc.zip | |
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Diffstat (limited to 'docs')
| -rw-r--r-- | docs/format.html | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/format.html b/docs/format.html index 8c21c00..4dd4e1a 100644 --- a/docs/format.html +++ b/docs/format.html @@ -143,7 +143,7 @@ RAM tiles are 42 bits wide. (Notice the two slightly smaller columns for the RAM The IO tiles on the top and bottom of the chip use a strange permutation pattern for their bits. It can be seen in the picture that their columns are spread out horizontally. What cannot be seen in the picture is the columns also are not in order and the bit positions are vertically permuted as well. The <span style="font-family:monospace">CramIndexConverter</span> class in <span style="font-family:monospace">icepack.cc</span> encapsulates the calculations -that are neccessary to convert between tile-relative bit addresses and CRAM bank-relative bit addresses. +that are necessary to convert between tile-relative bit addresses and CRAM bank-relative bit addresses. </p> <p> |