diff options
| author | David Shah <davey1576@gmail.com> | 2017-11-08 18:57:09 +0000 |
|---|---|---|
| committer | David Shah <davey1576@gmail.com> | 2017-11-17 15:07:52 +0000 |
| commit | 96b527bfeffb703baaa4119e48aae83ba0aa37cf (patch) | |
| tree | 11c5f70329cc5d099efba24d6fd2f32e8099b794 /icefuzz/cached_ramb_5k.txt | |
| parent | 629621642f4dd2d857edc914384b78161c438327 (diff) | |
| download | icestorm-96b527bfeffb703baaa4119e48aae83ba0aa37cf.tar.gz icestorm-96b527bfeffb703baaa4119e48aae83ba0aa37cf.tar.bz2 icestorm-96b527bfeffb703baaa4119e48aae83ba0aa37cf.zip | |
Create icefuzz scripts for DSP and 5k
Diffstat (limited to 'icefuzz/cached_ramb_5k.txt')
| -rw-r--r-- | icefuzz/cached_ramb_5k.txt | 494 |
1 files changed, 6 insertions, 488 deletions
diff --git a/icefuzz/cached_ramb_5k.txt b/icefuzz/cached_ramb_5k.txt index d553dbf..65c15e3 100644 --- a/icefuzz/cached_ramb_5k.txt +++ b/icefuzz/cached_ramb_5k.txt @@ -1,27 +1,18 @@ (0 0) Negative Clock bit +(0 10) routing glb_netwk_2 <X> glb2local_2 (0 10) routing glb_netwk_3 <X> glb2local_2 (0 10) routing glb_netwk_6 <X> glb2local_2 -(0 10) routing glb_netwk_7 <X> glb2local_2 -(0 11) routing glb_netwk_1 <X> glb2local_2 (0 11) routing glb_netwk_3 <X> glb2local_2 -(0 11) routing glb_netwk_5 <X> glb2local_2 -(0 11) routing glb_netwk_7 <X> glb2local_2 (0 12) routing glb_netwk_3 <X> glb2local_3 -(0 12) routing glb_netwk_6 <X> glb2local_3 (0 13) routing glb_netwk_1 <X> glb2local_3 (0 13) routing glb_netwk_3 <X> glb2local_3 -(0 13) routing glb_netwk_5 <X> glb2local_3 (0 14) routing glb_netwk_4 <X> wire_bram/ram/RE -(0 14) routing glb_netwk_6 <X> wire_bram/ram/RE (0 14) routing lc_trk_g2_4 <X> wire_bram/ram/RE (0 14) routing lc_trk_g3_5 <X> wire_bram/ram/RE -(0 15) routing glb_netwk_2 <X> wire_bram/ram/RE -(0 15) routing glb_netwk_6 <X> wire_bram/ram/RE (0 15) routing lc_trk_g1_5 <X> wire_bram/ram/RE (0 15) routing lc_trk_g3_5 <X> wire_bram/ram/RE (0 2) routing glb_netwk_2 <X> wire_bram/ram/RCLK (0 2) routing glb_netwk_3 <X> wire_bram/ram/RCLK -(0 2) routing glb_netwk_6 <X> wire_bram/ram/RCLK (0 2) routing glb_netwk_7 <X> wire_bram/ram/RCLK (0 2) routing lc_trk_g2_0 <X> wire_bram/ram/RCLK (0 2) routing lc_trk_g3_1 <X> wire_bram/ram/RCLK @@ -31,46 +22,22 @@ (0 3) routing glb_netwk_7 <X> wire_bram/ram/RCLK (0 3) routing lc_trk_g1_1 <X> wire_bram/ram/RCLK (0 3) routing lc_trk_g3_1 <X> wire_bram/ram/RCLK -(0 4) routing glb_netwk_5 <X> wire_bram/ram/RCLKE (0 4) routing lc_trk_g2_2 <X> wire_bram/ram/RCLKE (0 4) routing lc_trk_g3_3 <X> wire_bram/ram/RCLKE (0 5) routing lc_trk_g1_3 <X> wire_bram/ram/RCLKE (0 5) routing lc_trk_g3_3 <X> wire_bram/ram/RCLKE -(0 6) routing glb_netwk_3 <X> glb2local_0 -(0 6) routing glb_netwk_6 <X> glb2local_0 -(0 6) routing glb_netwk_7 <X> glb2local_0 (0 7) routing glb_netwk_1 <X> glb2local_0 -(0 7) routing glb_netwk_3 <X> glb2local_0 (0 7) routing glb_netwk_5 <X> glb2local_0 -(0 7) routing glb_netwk_7 <X> glb2local_0 -(0 8) routing glb_netwk_3 <X> glb2local_1 -(0 8) routing glb_netwk_6 <X> glb2local_1 -(0 8) routing glb_netwk_7 <X> glb2local_1 -(0 9) routing glb_netwk_1 <X> glb2local_1 -(0 9) routing glb_netwk_3 <X> glb2local_1 (0 9) routing glb_netwk_5 <X> glb2local_1 -(0 9) routing glb_netwk_7 <X> glb2local_1 -(1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_1 glb2local_2 +(1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_2 glb2local_2 (1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_3 glb2local_2 (1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_4 glb2local_2 -(1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_5 glb2local_2 (1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_6 glb2local_2 -(1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_7 glb2local_2 (1 11) routing glb_netwk_4 <X> glb2local_2 -(1 11) routing glb_netwk_5 <X> glb2local_2 (1 11) routing glb_netwk_6 <X> glb2local_2 -(1 11) routing glb_netwk_7 <X> glb2local_2 (1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_1 glb2local_3 (1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_3 glb2local_3 -(1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_4 glb2local_3 -(1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_5 glb2local_3 -(1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_6 glb2local_3 -(1 13) routing glb_netwk_4 <X> glb2local_3 -(1 13) routing glb_netwk_5 <X> glb2local_3 -(1 13) routing glb_netwk_6 <X> glb2local_3 -(1 14) Enable bit of Mux _global_links/set_rst_mux => glb_netwk_2 wire_bram/ram/RE (1 14) Enable bit of Mux _global_links/set_rst_mux => glb_netwk_4 wire_bram/ram/RE -(1 14) Enable bit of Mux _global_links/set_rst_mux => glb_netwk_6 wire_bram/ram/RE (1 14) Enable bit of Mux _global_links/set_rst_mux => lc_trk_g0_4 wire_bram/ram/RE (1 14) Enable bit of Mux _global_links/set_rst_mux => lc_trk_g1_5 wire_bram/ram/RE (1 14) Enable bit of Mux _global_links/set_rst_mux => lc_trk_g2_4 wire_bram/ram/RE @@ -81,10 +48,8 @@ (1 15) routing lc_trk_g3_5 <X> wire_bram/ram/RE (1 2) routing glb_netwk_4 <X> wire_bram/ram/RCLK (1 2) routing glb_netwk_5 <X> wire_bram/ram/RCLK -(1 2) routing glb_netwk_6 <X> wire_bram/ram/RCLK (1 2) routing glb_netwk_7 <X> wire_bram/ram/RCLK (1 3) Enable bit of Mux _span_links/cross_mux_horz_5 => sp12_h_l_9 sp4_h_r_17 -(1 4) Enable bit of Mux _global_links/ce_mux => glb_netwk_5 wire_bram/ram/RCLKE (1 4) Enable bit of Mux _global_links/ce_mux => lc_trk_g0_2 wire_bram/ram/RCLKE (1 4) Enable bit of Mux _global_links/ce_mux => lc_trk_g1_3 wire_bram/ram/RCLKE (1 4) Enable bit of Mux _global_links/ce_mux => lc_trk_g2_2 wire_bram/ram/RCLKE @@ -94,25 +59,10 @@ (1 5) routing lc_trk_g2_2 <X> wire_bram/ram/RCLKE (1 5) routing lc_trk_g3_3 <X> wire_bram/ram/RCLKE (1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_1 glb2local_0 -(1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_3 glb2local_0 -(1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_4 glb2local_0 (1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_5 glb2local_0 -(1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_6 glb2local_0 -(1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_7 glb2local_0 -(1 7) routing glb_netwk_4 <X> glb2local_0 (1 7) routing glb_netwk_5 <X> glb2local_0 -(1 7) routing glb_netwk_6 <X> glb2local_0 -(1 7) routing glb_netwk_7 <X> glb2local_0 -(1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_1 glb2local_1 -(1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_3 glb2local_1 -(1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_4 glb2local_1 (1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_5 glb2local_1 -(1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_6 glb2local_1 -(1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_7 glb2local_1 -(1 9) routing glb_netwk_4 <X> glb2local_1 (1 9) routing glb_netwk_5 <X> glb2local_1 -(1 9) routing glb_netwk_6 <X> glb2local_1 -(1 9) routing glb_netwk_7 <X> glb2local_1 (10 0) routing sp4_h_l_40 <X> sp4_h_r_1 (10 0) routing sp4_h_l_47 <X> sp4_h_r_1 (10 0) routing sp4_v_b_7 <X> sp4_h_r_1 @@ -214,6 +164,7 @@ (11 2) routing sp4_v_b_11 <X> sp4_v_t_39 (11 2) routing sp4_v_b_6 <X> sp4_v_t_39 (11 3) routing sp4_h_r_2 <X> sp4_h_l_39 +(11 3) routing sp4_h_r_6 <X> sp4_h_l_39 (11 3) routing sp4_v_t_39 <X> sp4_h_l_39 (11 3) routing sp4_v_t_45 <X> sp4_h_l_39 (11 4) routing sp4_h_l_46 <X> sp4_v_b_5 @@ -264,6 +215,7 @@ (12 13) routing sp4_h_l_46 <X> sp4_v_b_11 (12 13) routing sp4_h_r_11 <X> sp4_v_b_11 (12 13) routing sp4_v_t_45 <X> sp4_v_b_11 +(12 14) routing sp4_h_r_8 <X> sp4_h_l_46 (12 14) routing sp4_v_b_11 <X> sp4_h_l_46 (12 14) routing sp4_v_t_40 <X> sp4_h_l_46 (12 14) routing sp4_v_t_46 <X> sp4_h_l_46 @@ -332,6 +284,7 @@ (13 14) routing sp4_v_b_11 <X> sp4_v_t_46 (13 14) routing sp4_v_b_3 <X> sp4_v_t_46 (13 15) routing sp4_h_r_3 <X> sp4_h_l_46 +(13 15) routing sp4_h_r_8 <X> sp4_h_l_46 (13 15) routing sp4_v_b_6 <X> sp4_h_l_46 (13 15) routing sp4_v_t_40 <X> sp4_h_l_46 (13 2) routing sp4_h_r_2 <X> sp4_v_t_39 @@ -339,6 +292,7 @@ (13 2) routing sp4_v_b_2 <X> sp4_v_t_39 (13 2) routing sp4_v_b_6 <X> sp4_v_t_39 (13 3) routing sp4_h_r_11 <X> sp4_h_l_39 +(13 3) routing sp4_h_r_6 <X> sp4_h_l_39 (13 3) routing sp4_v_b_9 <X> sp4_h_l_39 (13 3) routing sp4_v_t_45 <X> sp4_h_l_39 (13 4) routing sp4_h_l_40 <X> sp4_v_b_5 @@ -442,13 +396,10 @@ (14 4) routing lft_op_0 <X> lc_trk_g1_0 (14 4) routing sp12_h_r_0 <X> lc_trk_g1_0 (14 4) routing sp4_h_r_16 <X> lc_trk_g1_0 -(14 4) routing sp4_h_r_8 <X> lc_trk_g1_0 (14 4) routing sp4_v_b_0 <X> lc_trk_g1_0 (14 4) routing sp4_v_b_8 <X> lc_trk_g1_0 (14 5) routing bnr_op_0 <X> lc_trk_g1_0 -(14 5) routing sp12_h_l_15 <X> lc_trk_g1_0 (14 5) routing sp12_h_r_0 <X> lc_trk_g1_0 -(14 5) routing sp4_h_r_0 <X> lc_trk_g1_0 (14 5) routing sp4_h_r_16 <X> lc_trk_g1_0 (14 5) routing sp4_r_v_b_24 <X> lc_trk_g1_0 (14 5) routing sp4_v_b_8 <X> lc_trk_g1_0 @@ -463,7 +414,6 @@ (14 7) routing sp12_h_l_3 <X> lc_trk_g1_4 (14 7) routing sp12_h_r_20 <X> lc_trk_g1_4 (14 7) routing sp4_h_l_9 <X> lc_trk_g1_4 -(14 7) routing sp4_h_r_4 <X> lc_trk_g1_4 (14 7) routing sp4_r_v_b_28 <X> lc_trk_g1_4 (14 7) routing sp4_v_b_12 <X> lc_trk_g1_4 (14 8) routing bnl_op_0 <X> lc_trk_g2_0 @@ -476,7 +426,6 @@ (14 9) routing bnl_op_0 <X> lc_trk_g2_0 (14 9) routing sp12_v_b_0 <X> lc_trk_g2_0 (14 9) routing sp12_v_b_16 <X> lc_trk_g2_0 -(14 9) routing sp4_h_r_24 <X> lc_trk_g2_0 (14 9) routing sp4_h_r_40 <X> lc_trk_g2_0 (14 9) routing sp4_r_v_b_32 <X> lc_trk_g2_0 (14 9) routing sp4_v_b_32 <X> lc_trk_g2_0 @@ -485,9 +434,7 @@ (15 0) routing sp12_h_r_1 <X> lc_trk_g0_1 (15 0) routing sp4_h_r_1 <X> lc_trk_g0_1 (15 0) routing sp4_h_r_17 <X> lc_trk_g0_1 -(15 0) routing sp4_h_r_9 <X> lc_trk_g0_1 (15 0) routing sp4_v_t_4 <X> lc_trk_g0_1 -(15 1) routing bot_op_0 <X> lc_trk_g0_0 (15 1) routing lft_op_0 <X> lc_trk_g0_0 (15 1) routing sp12_h_r_0 <X> lc_trk_g0_0 (15 1) routing sp4_h_r_0 <X> lc_trk_g0_0 @@ -499,9 +446,7 @@ (15 10) routing sp4_h_r_29 <X> lc_trk_g2_5 (15 10) routing sp4_h_r_37 <X> lc_trk_g2_5 (15 10) routing sp4_h_r_45 <X> lc_trk_g2_5 -(15 10) routing sp4_v_b_45 <X> lc_trk_g2_5 (15 10) routing tnl_op_5 <X> lc_trk_g2_5 -(15 10) routing tnr_op_5 <X> lc_trk_g2_5 (15 11) routing rgt_op_4 <X> lc_trk_g2_4 (15 11) routing sp12_v_b_4 <X> lc_trk_g2_4 (15 11) routing sp4_h_r_28 <X> lc_trk_g2_4 @@ -516,8 +461,6 @@ (15 12) routing sp4_h_r_25 <X> lc_trk_g3_1 (15 12) routing sp4_h_r_33 <X> lc_trk_g3_1 (15 12) routing sp4_v_b_41 <X> lc_trk_g3_1 -(15 12) routing tnl_op_1 <X> lc_trk_g3_1 -(15 12) routing tnr_op_1 <X> lc_trk_g3_1 (15 13) routing rgt_op_0 <X> lc_trk_g3_0 (15 13) routing sp12_v_b_0 <X> lc_trk_g3_0 (15 13) routing sp4_h_r_24 <X> lc_trk_g3_0 @@ -525,7 +468,6 @@ (15 13) routing sp4_h_r_40 <X> lc_trk_g3_0 (15 13) routing sp4_v_b_40 <X> lc_trk_g3_0 (15 13) routing tnl_op_0 <X> lc_trk_g3_0 -(15 13) routing tnr_op_0 <X> lc_trk_g3_0 (15 14) routing rgt_op_5 <X> lc_trk_g3_5 (15 14) routing sp12_v_b_5 <X> lc_trk_g3_5 (15 14) routing sp4_h_r_29 <X> lc_trk_g3_5 @@ -541,14 +483,11 @@ (15 15) routing sp4_h_r_44 <X> lc_trk_g3_4 (15 15) routing sp4_v_b_44 <X> lc_trk_g3_4 (15 15) routing tnl_op_4 <X> lc_trk_g3_4 -(15 15) routing tnr_op_4 <X> lc_trk_g3_4 (15 2) routing lft_op_5 <X> lc_trk_g0_5 -(15 2) routing sp12_h_l_2 <X> lc_trk_g0_5 (15 2) routing sp4_h_r_13 <X> lc_trk_g0_5 (15 2) routing sp4_h_r_21 <X> lc_trk_g0_5 (15 2) routing sp4_h_r_5 <X> lc_trk_g0_5 (15 2) routing sp4_v_t_8 <X> lc_trk_g0_5 -(15 3) routing bot_op_4 <X> lc_trk_g0_4 (15 3) routing lft_op_4 <X> lc_trk_g0_4 (15 3) routing sp12_h_l_3 <X> lc_trk_g0_4 (15 3) routing sp4_h_l_1 <X> lc_trk_g0_4 @@ -564,44 +503,32 @@ (15 5) routing bot_op_0 <X> lc_trk_g1_0 (15 5) routing lft_op_0 <X> lc_trk_g1_0 (15 5) routing sp12_h_r_0 <X> lc_trk_g1_0 -(15 5) routing sp4_h_r_0 <X> lc_trk_g1_0 (15 5) routing sp4_h_r_16 <X> lc_trk_g1_0 -(15 5) routing sp4_h_r_8 <X> lc_trk_g1_0 (15 5) routing sp4_v_b_16 <X> lc_trk_g1_0 (15 6) routing lft_op_5 <X> lc_trk_g1_5 -(15 6) routing sp12_h_l_2 <X> lc_trk_g1_5 (15 6) routing sp4_h_r_13 <X> lc_trk_g1_5 (15 6) routing sp4_h_r_21 <X> lc_trk_g1_5 (15 6) routing sp4_h_r_5 <X> lc_trk_g1_5 (15 6) routing sp4_v_t_8 <X> lc_trk_g1_5 -(15 7) routing bot_op_4 <X> lc_trk_g1_4 (15 7) routing lft_op_4 <X> lc_trk_g1_4 (15 7) routing sp12_h_l_3 <X> lc_trk_g1_4 (15 7) routing sp4_h_l_1 <X> lc_trk_g1_4 (15 7) routing sp4_h_l_9 <X> lc_trk_g1_4 -(15 7) routing sp4_h_r_4 <X> lc_trk_g1_4 (15 7) routing sp4_v_b_20 <X> lc_trk_g1_4 (15 8) routing rgt_op_1 <X> lc_trk_g2_1 -(15 8) routing sp12_v_b_1 <X> lc_trk_g2_1 (15 8) routing sp4_h_l_28 <X> lc_trk_g2_1 (15 8) routing sp4_h_r_25 <X> lc_trk_g2_1 (15 8) routing sp4_h_r_33 <X> lc_trk_g2_1 (15 8) routing sp4_v_b_41 <X> lc_trk_g2_1 (15 8) routing tnl_op_1 <X> lc_trk_g2_1 -(15 8) routing tnr_op_1 <X> lc_trk_g2_1 (15 9) routing rgt_op_0 <X> lc_trk_g2_0 (15 9) routing sp12_v_b_0 <X> lc_trk_g2_0 -(15 9) routing sp4_h_r_24 <X> lc_trk_g2_0 (15 9) routing sp4_h_r_32 <X> lc_trk_g2_0 (15 9) routing sp4_h_r_40 <X> lc_trk_g2_0 (15 9) routing sp4_v_b_40 <X> lc_trk_g2_0 (15 9) routing tnl_op_0 <X> lc_trk_g2_0 -(15 9) routing tnr_op_0 <X> lc_trk_g2_0 -(16 0) routing sp12_h_l_14 <X> lc_trk_g0_1 -(16 0) routing sp12_h_r_9 <X> lc_trk_g0_1 (16 0) routing sp4_h_r_1 <X> lc_trk_g0_1 (16 0) routing sp4_h_r_17 <X> lc_trk_g0_1 -(16 0) routing sp4_h_r_9 <X> lc_trk_g0_1 (16 0) routing sp4_v_b_1 <X> lc_trk_g0_1 (16 0) routing sp4_v_b_9 <X> lc_trk_g0_1 (16 0) routing sp4_v_t_4 <X> lc_trk_g0_1 @@ -619,7 +546,6 @@ (16 10) routing sp4_h_r_37 <X> lc_trk_g2_5 (16 10) routing sp4_h_r_45 <X> lc_trk_g2_5 (16 10) routing sp4_v_b_29 <X> lc_trk_g2_5 -(16 10) routing sp4_v_b_45 <X> lc_trk_g2_5 (16 10) routing sp4_v_t_24 <X> lc_trk_g2_5 (16 11) routing sp12_v_b_20 <X> lc_trk_g2_4 (16 11) routing sp12_v_t_11 <X> lc_trk_g2_4 @@ -661,8 +587,6 @@ (16 15) routing sp4_v_b_28 <X> lc_trk_g3_4 (16 15) routing sp4_v_b_44 <X> lc_trk_g3_4 (16 15) routing sp4_v_t_25 <X> lc_trk_g3_4 -(16 2) routing sp12_h_l_10 <X> lc_trk_g0_5 -(16 2) routing sp12_h_r_21 <X> lc_trk_g0_5 (16 2) routing sp4_h_r_13 <X> lc_trk_g0_5 (16 2) routing sp4_h_r_21 <X> lc_trk_g0_5 (16 2) routing sp4_h_r_5 <X> lc_trk_g0_5 @@ -678,23 +602,17 @@ (16 3) routing sp4_v_b_20 <X> lc_trk_g0_4 (16 3) routing sp4_v_b_4 <X> lc_trk_g0_4 (16 4) routing sp12_h_l_14 <X> lc_trk_g1_1 -(16 4) routing sp12_h_r_9 <X> lc_trk_g1_1 (16 4) routing sp4_h_r_1 <X> lc_trk_g1_1 (16 4) routing sp4_h_r_17 <X> lc_trk_g1_1 (16 4) routing sp4_h_r_9 <X> lc_trk_g1_1 (16 4) routing sp4_v_b_1 <X> lc_trk_g1_1 (16 4) routing sp4_v_b_9 <X> lc_trk_g1_1 (16 4) routing sp4_v_t_4 <X> lc_trk_g1_1 -(16 5) routing sp12_h_l_15 <X> lc_trk_g1_0 (16 5) routing sp12_h_r_8 <X> lc_trk_g1_0 -(16 5) routing sp4_h_r_0 <X> lc_trk_g1_0 (16 5) routing sp4_h_r_16 <X> lc_trk_g1_0 -(16 5) routing sp4_h_r_8 <X> lc_trk_g1_0 (16 5) routing sp4_v_b_0 <X> lc_trk_g1_0 (16 5) routing sp4_v_b_16 <X> lc_trk_g1_0 (16 5) routing sp4_v_b_8 <X> lc_trk_g1_0 -(16 6) routing sp12_h_l_10 <X> lc_trk_g1_5 -(16 6) routing sp12_h_r_21 <X> lc_trk_g1_5 (16 6) routing sp4_h_r_13 <X> lc_trk_g1_5 (16 6) routing sp4_h_r_21 <X> lc_trk_g1_5 (16 6) routing sp4_h_r_5 <X> lc_trk_g1_5 @@ -705,7 +623,6 @@ (16 7) routing sp12_h_r_20 <X> lc_trk_g1_4 (16 7) routing sp4_h_l_1 <X> lc_trk_g1_4 (16 7) routing sp4_h_l_9 <X> lc_trk_g1_4 -(16 7) routing sp4_h_r_4 <X> lc_trk_g1_4 (16 7) routing sp4_v_b_12 <X> lc_trk_g1_4 (16 7) routing sp4_v_b_20 <X> lc_trk_g1_4 (16 7) routing sp4_v_b_4 <X> lc_trk_g1_4 @@ -719,7 +636,6 @@ (16 8) routing sp4_v_t_20 <X> lc_trk_g2_1 (16 9) routing sp12_v_b_16 <X> lc_trk_g2_0 (16 9) routing sp12_v_t_7 <X> lc_trk_g2_0 -(16 9) routing sp4_h_r_24 <X> lc_trk_g2_0 (16 9) routing sp4_h_r_32 <X> lc_trk_g2_0 (16 9) routing sp4_h_r_40 <X> lc_trk_g2_0 (16 9) routing sp4_v_b_32 <X> lc_trk_g2_0 @@ -727,19 +643,15 @@ (16 9) routing sp4_v_t_13 <X> lc_trk_g2_0 (17 0) Enable bit of Mux _local_links/g0_mux_1 => bnr_op_1 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => lft_op_1 lc_trk_g0_1 -(17 0) Enable bit of Mux _local_links/g0_mux_1 => sp12_h_l_14 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp12_h_r_1 lc_trk_g0_1 -(17 0) Enable bit of Mux _local_links/g0_mux_1 => sp12_h_r_9 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_h_r_1 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_h_r_17 lc_trk_g0_1 -(17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_h_r_9 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_r_v_b_25 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_r_v_b_34 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_v_b_1 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_v_b_9 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_v_t_4 lc_trk_g0_1 (17 1) Enable bit of Mux _local_links/g0_mux_0 => bnr_op_0 lc_trk_g0_0 -(17 1) Enable bit of Mux _local_links/g0_mux_0 => bot_op_0 lc_trk_g0_0 (17 1) Enable bit of Mux _local_links/g0_mux_0 => lft_op_0 lc_trk_g0_0 (17 1) Enable bit of Mux _local_links/g0_mux_0 => sp12_h_l_15 lc_trk_g0_0 (17 1) Enable bit of Mux _local_links/g0_mux_0 => sp12_h_r_0 lc_trk_g0_0 @@ -763,10 +675,8 @@ (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_r_v_b_13 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_r_v_b_37 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_v_b_29 lc_trk_g2_5 -(17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_v_b_45 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_v_t_24 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => tnl_op_5 lc_trk_g2_5 -(17 10) Enable bit of Mux _local_links/g2_mux_5 => tnr_op_5 lc_trk_g2_5 (17 11) Enable bit of Mux _local_links/g2_mux_4 => bnl_op_4 lc_trk_g2_4 (17 11) Enable bit of Mux _local_links/g2_mux_4 => rgt_op_4 lc_trk_g2_4 (17 11) Enable bit of Mux _local_links/g2_mux_4 => sp12_v_b_20 lc_trk_g2_4 @@ -795,8 +705,6 @@ (17 12) Enable bit of Mux _local_links/g3_mux_1 => sp4_v_b_25 lc_trk_g3_1 (17 12) Enable bit of Mux _local_links/g3_mux_1 => sp4_v_b_41 lc_trk_g3_1 (17 12) Enable bit of Mux _local_links/g3_mux_1 => sp4_v_t_20 lc_trk_g3_1 -(17 12) Enable bit of Mux _local_links/g3_mux_1 => tnl_op_1 lc_trk_g3_1 -(17 12) Enable bit of Mux _local_links/g3_mux_1 => tnr_op_1 lc_trk_g3_1 (17 13) Enable bit of Mux _local_links/g3_mux_0 => bnl_op_0 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => rgt_op_0 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => sp12_v_b_0 lc_trk_g3_0 @@ -811,7 +719,6 @@ (17 13) Enable bit of Mux _local_links/g3_mux_0 => sp4_v_b_40 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => sp4_v_t_13 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => tnl_op_0 lc_trk_g3_0 -(17 13) Enable bit of Mux _local_links/g3_mux_0 => tnr_op_0 lc_trk_g3_0 (17 14) Enable bit of Mux _local_links/g3_mux_5 => bnl_op_5 lc_trk_g3_5 (17 14) Enable bit of Mux _local_links/g3_mux_5 => rgt_op_5 lc_trk_g3_5 (17 14) Enable bit of Mux _local_links/g3_mux_5 => sp12_v_b_13 lc_trk_g3_5 @@ -841,13 +748,9 @@ (17 15) Enable bit of Mux _local_links/g3_mux_4 => sp4_v_b_44 lc_trk_g3_4 (17 15) Enable bit of Mux _local_links/g3_mux_4 => sp4_v_t_25 lc_trk_g3_4 (17 15) Enable bit of Mux _local_links/g3_mux_4 => tnl_op_4 lc_trk_g3_4 -(17 15) Enable bit of Mux _local_links/g3_mux_4 => tnr_op_4 lc_trk_g3_4 (17 2) Enable bit of Mux _local_links/g0_mux_5 => bnr_op_5 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => glb2local_1 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => lft_op_5 lc_trk_g0_5 -(17 2) Enable bit of Mux _local_links/g0_mux_5 => sp12_h_l_10 lc_trk_g0_5 -(17 2) Enable bit of Mux _local_links/g0_mux_5 => sp12_h_l_2 lc_trk_g0_5 -(17 2) Enable bit of Mux _local_links/g0_mux_5 => sp12_h_r_21 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => sp4_h_r_13 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => sp4_h_r_21 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => sp4_h_r_5 lc_trk_g0_5 @@ -856,7 +759,6 @@ (17 2) Enable bit of Mux _local_links/g0_mux_5 => sp4_v_b_5 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => sp4_v_t_8 lc_trk_g0_5 (17 3) Enable bit of Mux _local_links/g0_mux_4 => bnr_op_4 lc_trk_g0_4 -(17 3) Enable bit of Mux _local_links/g0_mux_4 => bot_op_4 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => glb2local_0 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => lft_op_4 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => sp12_h_l_3 lc_trk_g0_4 @@ -873,7 +775,6 @@ (17 4) Enable bit of Mux _local_links/g1_mux_1 => lft_op_1 lc_trk_g1_1 (17 4) Enable bit of Mux _local_links/g1_mux_1 => sp12_h_l_14 lc_trk_g1_1 (17 4) Enable bit of Mux _local_links/g1_mux_1 => sp12_h_r_1 lc_trk_g1_1 -(17 4) Enable bit of Mux _local_links/g1_mux_1 => sp12_h_r_9 lc_trk_g1_1 (17 4) Enable bit of Mux _local_links/g1_mux_1 => sp4_h_r_1 lc_trk_g1_1 (17 4) Enable bit of Mux _local_links/g1_mux_1 => sp4_h_r_17 lc_trk_g1_1 (17 4) Enable bit of Mux _local_links/g1_mux_1 => sp4_h_r_9 lc_trk_g1_1 @@ -885,12 +786,9 @@ (17 5) Enable bit of Mux _local_links/g1_mux_0 => bnr_op_0 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => bot_op_0 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => lft_op_0 lc_trk_g1_0 -(17 5) Enable bit of Mux _local_links/g1_mux_0 => sp12_h_l_15 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp12_h_r_0 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp12_h_r_8 lc_trk_g1_0 -(17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_h_r_0 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_h_r_16 lc_trk_g1_0 -(17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_h_r_8 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_r_v_b_0 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_r_v_b_24 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_v_b_0 lc_trk_g1_0 @@ -898,9 +796,6 @@ (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_v_b_8 lc_trk_g1_0 (17 6) Enable bit of Mux _local_links/g1_mux_5 => bnr_op_5 lc_trk_g1_5 (17 6) Enable bit of Mux _local_links/g1_mux_5 => lft_op_5 lc_trk_g1_5 -(17 6) Enable bit of Mux _local_links/g1_mux_5 => sp12_h_l_10 lc_trk_g1_5 -(17 6) Enable bit of Mux _local_links/g1_mux_5 => sp12_h_l_2 lc_trk_g1_5 -(17 6) Enable bit of Mux _local_links/g1_mux_5 => sp12_h_r_21 lc_trk_g1_5 (17 6) Enable bit of Mux _local_links/g1_mux_5 => sp4_h_r_13 lc_trk_g1_5 (17 6) Enable bit of Mux _local_links/g1_mux_5 => sp4_h_r_21 lc_trk_g1_5 (17 6) Enable bit of Mux _local_links/g1_mux_5 => sp4_h_r_5 lc_trk_g1_5 @@ -910,14 +805,12 @@ (17 6) Enable bit of Mux _local_links/g1_mux_5 => sp4_v_b_5 lc_trk_g1_5 (17 6) Enable bit of Mux _local_links/g1_mux_5 => sp4_v_t_8 lc_trk_g1_5 (17 7) Enable bit of Mux _local_links/g1_mux_4 => bnr_op_4 lc_trk_g1_4 -(17 7) Enable bit of Mux _local_links/g1_mux_4 => bot_op_4 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => lft_op_4 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp12_h_l_3 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp12_h_r_12 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp12_h_r_20 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_h_l_1 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_h_l_9 lc_trk_g1_4 -(17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_h_r_4 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_r_v_b_28 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_r_v_b_4 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_v_b_12 lc_trk_g1_4 @@ -925,7 +818,6 @@ (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_v_b_4 lc_trk_g1_4 (17 8) Enable bit of Mux _local_links/g2_mux_1 => bnl_op_1 lc_trk_g2_1 (17 8) Enable bit of Mux _local_links/g2_mux_1 => rgt_op_1 lc_trk_g2_1 -(17 8) Enable bit of Mux _local_links/g2_mux_1 => sp12_v_b_1 lc_trk_g2_1 (17 8) Enable bit of Mux _local_links/g2_mux_1 => sp12_v_b_9 lc_trk_g2_1 (17 8) Enable bit of Mux _local_links/g2_mux_1 => sp12_v_t_14 lc_trk_g2_1 (17 8) Enable bit of Mux _local_links/g2_mux_1 => sp4_h_l_28 lc_trk_g2_1 @@ -937,13 +829,11 @@ (17 8) Enable bit of Mux _local_links/g2_mux_1 => sp4_v_b_41 lc_trk_g2_1 (17 8) Enable bit of Mux _local_links/g2_mux_1 => sp4_v_t_20 lc_trk_g2_1 (17 8) Enable bit of Mux _local_links/g2_mux_1 => tnl_op_1 lc_trk_g2_1 -(17 8) Enable bit of Mux _local_links/g2_mux_1 => tnr_op_1 lc_trk_g2_1 (17 9) Enable bit of Mux _local_links/g2_mux_0 => bnl_op_0 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => rgt_op_0 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp12_v_b_0 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp12_v_b_16 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp12_v_t_7 lc_trk_g2_0 -(17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_h_r_24 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_h_r_32 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_h_r_40 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_r_v_b_32 lc_trk_g2_0 @@ -952,16 +842,13 @@ (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_v_b_40 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_v_t_13 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => tnl_op_0 lc_trk_g2_0 -(17 9) Enable bit of Mux _local_links/g2_mux_0 => tnr_op_0 lc_trk_g2_0 (18 0) routing bnr_op_1 <X> lc_trk_g0_1 (18 0) routing lft_op_1 <X> lc_trk_g0_1 (18 0) routing sp12_h_r_1 <X> lc_trk_g0_1 (18 0) routing sp4_h_r_17 <X> lc_trk_g0_1 -(18 0) routing sp4_h_r_9 <X> lc_trk_g0_1 (18 0) routing sp4_v_b_1 <X> lc_trk_g0_1 (18 0) routing sp4_v_b_9 <X> lc_trk_g0_1 (18 1) routing bnr_op_1 <X> lc_trk_g0_1 -(18 1) routing sp12_h_l_14 <X> lc_trk_g0_1 (18 1) routing sp12_h_r_1 <X> lc_trk_g0_1 (18 1) routing sp4_h_r_1 <X> lc_trk_g0_1 (18 1) routing sp4_h_r_17 <X> lc_trk_g0_1 @@ -996,7 +883,6 @@ (18 13) routing sp4_h_r_25 <X> lc_trk_g3_1 (18 13) routing sp4_r_v_b_41 <X> lc_trk_g3_1 (18 13) routing sp4_v_t_20 <X> lc_trk_g3_1 -(18 13) routing tnl_op_1 <X> lc_trk_g3_1 (18 14) routing bnl_op_5 <X> lc_trk_g3_5 (18 14) routing rgt_op_5 <X> lc_trk_g3_5 (18 14) routing sp12_v_b_5 <X> lc_trk_g3_5 @@ -1014,14 +900,11 @@ (18 15) routing tnl_op_5 <X> lc_trk_g3_5 (18 2) routing bnr_op_5 <X> lc_trk_g0_5 (18 2) routing lft_op_5 <X> lc_trk_g0_5 -(18 2) routing sp12_h_l_2 <X> lc_trk_g0_5 (18 2) routing sp4_h_r_13 <X> lc_trk_g0_5 (18 2) routing sp4_h_r_21 <X> lc_trk_g0_5 (18 2) routing sp4_v_b_13 <X> lc_trk_g0_5 (18 2) routing sp4_v_b_5 <X> lc_trk_g0_5 (18 3) routing bnr_op_5 <X> lc_trk_g0_5 -(18 3) routing sp12_h_l_2 <X> lc_trk_g0_5 -(18 3) routing sp12_h_r_21 <X> lc_trk_g0_5 (18 3) routing sp4_h_r_21 <X> lc_trk_g0_5 (18 3) routing sp4_h_r_5 <X> lc_trk_g0_5 (18 3) routing sp4_r_v_b_29 <X> lc_trk_g0_5 @@ -1042,27 +925,22 @@ (18 5) routing sp4_v_b_9 <X> lc_trk_g1_1 (18 6) routing bnr_op_5 <X> lc_trk_g1_5 (18 6) routing lft_op_5 <X> lc_trk_g1_5 -(18 6) routing sp12_h_l_2 <X> lc_trk_g1_5 (18 6) routing sp4_h_r_13 <X> lc_trk_g1_5 (18 6) routing sp4_h_r_21 <X> lc_trk_g1_5 (18 6) routing sp4_v_b_13 <X> lc_trk_g1_5 (18 6) routing sp4_v_b_5 <X> lc_trk_g1_5 (18 7) routing bnr_op_5 <X> lc_trk_g1_5 -(18 7) routing sp12_h_l_2 <X> lc_trk_g1_5 -(18 7) routing sp12_h_r_21 <X> lc_trk_g1_5 (18 7) routing sp4_h_r_21 <X> lc_trk_g1_5 (18 7) routing sp4_h_r_5 <X> lc_trk_g1_5 (18 7) routing sp4_r_v_b_29 <X> lc_trk_g1_5 (18 7) routing sp4_v_b_13 <X> lc_trk_g1_5 (18 8) routing bnl_op_1 <X> lc_trk_g2_1 (18 8) routing rgt_op_1 <X> lc_trk_g2_1 -(18 8) routing sp12_v_b_1 <X> lc_trk_g2_1 (18 8) routing sp4_h_l_28 <X> lc_trk_g2_1 (18 8) routing sp4_h_r_33 <X> lc_trk_g2_1 (18 8) routing sp4_v_b_25 <X> lc_trk_g2_1 (18 8) routing sp4_v_t_20 <X> lc_trk_g2_1 (18 9) routing bnl_op_1 <X> lc_trk_g2_1 -(18 9) routing sp12_v_b_1 <X> lc_trk_g2_1 (18 9) routing sp12_v_t_14 <X> lc_trk_g2_1 (18 9) routing sp4_h_l_28 <X> lc_trk_g2_1 (18 9) routing sp4_h_r_25 <X> lc_trk_g2_1 @@ -1089,13 +967,11 @@ (2 10) Enable bit of Mux _span_links/cross_mux_horz_9 => sp12_h_l_17 sp4_h_r_21 (2 12) Enable bit of Mux _span_links/cross_mux_horz_10 => sp12_h_r_20 sp4_h_l_11 (2 14) Enable bit of Mux _span_links/cross_mux_horz_11 => sp12_h_r_22 sp4_h_r_23 -(2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_0 wire_bram/ram/RCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_1 wire_bram/ram/RCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_2 wire_bram/ram/RCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_3 wire_bram/ram/RCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_4 wire_bram/ram/RCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_5 wire_bram/ram/RCLK -(2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_6 wire_bram/ram/RCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_7 wire_bram/ram/RCLK (2 2) Enable bit of Mux _global_links/clk_mux => lc_trk_g0_0 wire_bram/ram/RCLK (2 2) Enable bit of Mux _global_links/clk_mux => lc_trk_g1_1 wire_bram/ram/RCLK @@ -1112,7 +988,6 @@ (21 0) routing lft_op_3 <X> lc_trk_g0_3 (21 0) routing sp12_h_r_3 <X> lc_trk_g0_3 (21 0) routing sp4_h_l_6 <X> lc_trk_g0_3 -(21 0) routing sp4_h_r_11 <X> lc_trk_g0_3 (21 0) routing sp4_v_b_11 <X> lc_trk_g0_3 (21 0) routing sp4_v_b_3 <X> lc_trk_g0_3 (21 1) routing bnr_op_3 <X> lc_trk_g0_3 @@ -1125,18 +1000,15 @@ (21 10) routing bnl_op_7 <X> lc_trk_g2_7 (21 10) routing rgt_op_7 <X> lc_trk_g2_7 (21 10) routing sp12_v_t_4 <X> lc_trk_g2_7 -(21 10) routing sp4_h_l_26 <X> lc_trk_g2_7 (21 10) routing sp4_h_r_47 <X> lc_trk_g2_7 (21 10) routing sp4_v_b_31 <X> lc_trk_g2_7 (21 10) routing sp4_v_t_26 <X> lc_trk_g2_7 (21 11) routing bnl_op_7 <X> lc_trk_g2_7 -(21 11) routing sp12_v_t_20 <X> lc_trk_g2_7 (21 11) routing sp12_v_t_4 <X> lc_trk_g2_7 (21 11) routing sp4_h_r_31 <X> lc_trk_g2_7 (21 11) routing sp4_h_r_47 <X> lc_trk_g2_7 (21 11) routing sp4_r_v_b_39 <X> lc_trk_g2_7 (21 11) routing sp4_v_t_26 <X> lc_trk_g2_7 -(21 11) routing tnl_op_7 <X> lc_trk_g2_7 (21 12) routing bnl_op_3 <X> lc_trk_g3_3 (21 12) routing rgt_op_3 <X> lc_trk_g3_3 (21 12) routing sp12_v_b_3 <X> lc_trk_g3_3 @@ -1151,58 +1023,49 @@ (21 13) routing sp4_h_r_43 <X> lc_trk_g3_3 (21 13) routing sp4_r_v_b_43 <X> lc_trk_g3_3 (21 13) routing sp4_v_b_35 <X> lc_trk_g3_3 -(21 13) routing tnl_op_3 <X> lc_trk_g3_3 (21 14) routing bnl_op_7 <X> lc_trk_g3_7 (21 14) routing rgt_op_7 <X> lc_trk_g3_7 (21 14) routing sp12_v_t_4 <X> lc_trk_g3_7 (21 14) routing sp4_h_l_26 <X> lc_trk_g3_7 -(21 14) routing sp4_h_r_47 <X> lc_trk_g3_7 (21 14) routing sp4_v_b_31 <X> lc_trk_g3_7 (21 14) routing sp4_v_t_26 <X> lc_trk_g3_7 (21 15) routing bnl_op_7 <X> lc_trk_g3_7 (21 15) routing sp12_v_t_20 <X> lc_trk_g3_7 (21 15) routing sp12_v_t_4 <X> lc_trk_g3_7 (21 15) routing sp4_h_r_31 <X> lc_trk_g3_7 -(21 15) routing sp4_h_r_47 <X> lc_trk_g3_7 (21 15) routing sp4_r_v_b_47 <X> lc_trk_g3_7 (21 15) routing sp4_v_t_26 <X> lc_trk_g3_7 (21 15) routing tnl_op_7 <X> lc_trk_g3_7 (21 2) routing bnr_op_7 <X> lc_trk_g0_7 (21 2) routing lft_op_7 <X> lc_trk_g0_7 -(21 2) routing sp12_h_r_7 <X> lc_trk_g0_7 (21 2) routing sp4_h_r_15 <X> lc_trk_g0_7 (21 2) routing sp4_h_r_23 <X> lc_trk_g0_7 (21 2) routing sp4_v_b_7 <X> lc_trk_g0_7 (21 2) routing sp4_v_t_2 <X> lc_trk_g0_7 (21 3) routing bnr_op_7 <X> lc_trk_g0_7 (21 3) routing sp12_h_l_20 <X> lc_trk_g0_7 -(21 3) routing sp12_h_r_7 <X> lc_trk_g0_7 (21 3) routing sp4_h_r_23 <X> lc_trk_g0_7 (21 3) routing sp4_h_r_7 <X> lc_trk_g0_7 (21 3) routing sp4_r_v_b_31 <X> lc_trk_g0_7 (21 3) routing sp4_v_t_2 <X> lc_trk_g0_7 -(21 4) routing bnr_op_3 <X> lc_trk_g1_3 (21 4) routing lft_op_3 <X> lc_trk_g1_3 (21 4) routing sp12_h_r_3 <X> lc_trk_g1_3 (21 4) routing sp4_h_l_6 <X> lc_trk_g1_3 (21 4) routing sp4_h_r_11 <X> lc_trk_g1_3 (21 4) routing sp4_v_b_11 <X> lc_trk_g1_3 (21 4) routing sp4_v_b_3 <X> lc_trk_g1_3 -(21 5) routing bnr_op_3 <X> lc_trk_g1_3 (21 5) routing sp12_h_l_16 <X> lc_trk_g1_3 (21 5) routing sp12_h_r_3 <X> lc_trk_g1_3 (21 5) routing sp4_h_l_6 <X> lc_trk_g1_3 (21 5) routing sp4_h_r_3 <X> lc_trk_g1_3 (21 5) routing sp4_r_v_b_27 <X> lc_trk_g1_3 (21 5) routing sp4_v_b_11 <X> lc_trk_g1_3 -(21 6) routing bnr_op_7 <X> lc_trk_g1_7 (21 6) routing lft_op_7 <X> lc_trk_g1_7 (21 6) routing sp12_h_r_7 <X> lc_trk_g1_7 (21 6) routing sp4_h_r_15 <X> lc_trk_g1_7 (21 6) routing sp4_h_r_23 <X> lc_trk_g1_7 (21 6) routing sp4_v_b_7 <X> lc_trk_g1_7 (21 6) routing sp4_v_t_2 <X> lc_trk_g1_7 -(21 7) routing bnr_op_7 <X> lc_trk_g1_7 (21 7) routing sp12_h_l_20 <X> lc_trk_g1_7 (21 7) routing sp12_h_r_7 <X> lc_trk_g1_7 (21 7) routing sp4_h_r_23 <X> lc_trk_g1_7 @@ -1211,14 +1074,11 @@ (21 7) routing sp4_v_t_2 <X> lc_trk_g1_7 (21 8) routing bnl_op_3 <X> lc_trk_g2_3 (21 8) routing rgt_op_3 <X> lc_trk_g2_3 -(21 8) routing sp12_v_b_3 <X> lc_trk_g2_3 -(21 8) routing sp4_h_l_22 <X> lc_trk_g2_3 (21 8) routing sp4_h_r_43 <X> lc_trk_g2_3 (21 8) routing sp4_v_b_27 <X> lc_trk_g2_3 (21 8) routing sp4_v_b_35 <X> lc_trk_g2_3 (21 9) routing bnl_op_3 <X> lc_trk_g2_3 (21 9) routing sp12_v_b_19 <X> lc_trk_g2_3 -(21 9) routing sp12_v_b_3 <X> lc_trk_g2_3 (21 9) routing sp4_h_l_14 <X> lc_trk_g2_3 (21 9) routing sp4_h_r_43 <X> lc_trk_g2_3 (21 9) routing sp4_r_v_b_35 <X> lc_trk_g2_3 @@ -1230,7 +1090,6 @@ (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp12_h_r_11 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp12_h_r_3 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_h_l_6 lc_trk_g0_3 -(22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_h_r_11 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_h_r_3 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_r_v_b_27 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_r_v_b_32 lc_trk_g0_3 @@ -1238,11 +1097,9 @@ (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_v_b_3 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_v_t_6 lc_trk_g0_3 (22 1) Enable bit of Mux _local_links/g0_mux_2 => bnr_op_2 lc_trk_g0_2 -(22 1) Enable bit of Mux _local_links/g0_mux_2 => bot_op_2 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => lft_op_2 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp12_h_l_1 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp12_h_l_17 lc_trk_g0_2 -(22 1) Enable bit of Mux _local_links/g0_mux_2 => sp12_h_l_9 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp4_h_r_10 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp4_h_r_18 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp4_h_r_2 lc_trk_g0_2 @@ -1254,9 +1111,7 @@ (22 10) Enable bit of Mux _local_links/g2_mux_7 => bnl_op_7 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => rgt_op_7 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp12_v_t_12 lc_trk_g2_7 -(22 10) Enable bit of Mux _local_links/g2_mux_7 => sp12_v_t_20 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp12_v_t_4 lc_trk_g2_7 -(22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_h_l_26 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_h_r_31 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_h_r_47 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_r_v_b_15 lc_trk_g2_7 @@ -1264,8 +1119,6 @@ (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_v_b_31 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_v_t_26 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_v_t_34 lc_trk_g2_7 -(22 10) Enable bit of Mux _local_links/g2_mux_7 => tnl_op_7 lc_trk_g2_7 -(22 10) Enable bit of Mux _local_links/g2_mux_7 => tnr_op_7 lc_trk_g2_7 (22 11) Enable bit of Mux _local_links/g2_mux_6 => bnl_op_6 lc_trk_g2_6 (22 11) Enable bit of Mux _local_links/g2_mux_6 => rgt_op_6 lc_trk_g2_6 (22 11) Enable bit of Mux _local_links/g2_mux_6 => sp12_v_b_14 lc_trk_g2_6 @@ -1294,8 +1147,6 @@ (22 12) Enable bit of Mux _local_links/g3_mux_3 => sp4_v_b_27 lc_trk_g3_3 (22 12) Enable bit of Mux _local_links/g3_mux_3 => sp4_v_b_35 lc_trk_g3_3 (22 12) Enable bit of Mux _local_links/g3_mux_3 => sp4_v_b_43 lc_trk_g3_3 -(22 12) Enable bit of Mux _local_links/g3_mux_3 => tnl_op_3 lc_trk_g3_3 -(22 12) Enable bit of Mux _local_links/g3_mux_3 => tnr_op_3 lc_trk_g3_3 (22 13) Enable bit of Mux _local_links/g3_mux_2 => bnl_op_2 lc_trk_g3_2 (22 13) Enable bit of Mux _local_links/g3_mux_2 => rgt_op_2 lc_trk_g3_2 (22 13) Enable bit of Mux _local_links/g3_mux_2 => sp12_v_b_10 lc_trk_g3_2 @@ -1310,7 +1161,6 @@ (22 13) Enable bit of Mux _local_links/g3_mux_2 => sp4_v_t_15 lc_trk_g3_2 (22 13) Enable bit of Mux _local_links/g3_mux_2 => sp4_v_t_31 lc_trk_g3_2 (22 13) Enable bit of Mux _local_links/g3_mux_2 => tnl_op_2 lc_trk_g3_2 -(22 13) Enable bit of Mux _local_links/g3_mux_2 => tnr_op_2 lc_trk_g3_2 (22 14) Enable bit of Mux _local_links/g3_mux_7 => bnl_op_7 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => rgt_op_7 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp12_v_t_12 lc_trk_g3_7 @@ -1318,14 +1168,12 @@ (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp12_v_t_4 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_h_l_26 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_h_r_31 lc_trk_g3_7 -(22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_h_r_47 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_r_v_b_23 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_r_v_b_47 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_v_b_31 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_v_t_26 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_v_t_34 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => tnl_op_7 lc_trk_g3_7 -(22 14) Enable bit of Mux _local_links/g3_mux_7 => tnr_op_7 lc_trk_g3_7 (22 15) Enable bit of Mux _local_links/g3_mux_6 => bnl_op_6 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => rgt_op_6 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp12_v_b_14 lc_trk_g3_6 @@ -1336,7 +1184,6 @@ (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_h_r_46 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_r_v_b_22 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_r_v_b_46 lc_trk_g3_6 -(22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_v_b_46 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_v_t_19 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_v_t_27 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => tnl_op_6 lc_trk_g3_6 @@ -1346,7 +1193,6 @@ (22 2) Enable bit of Mux _local_links/g0_mux_7 => lft_op_7 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp12_h_l_12 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp12_h_l_20 lc_trk_g0_7 -(22 2) Enable bit of Mux _local_links/g0_mux_7 => sp12_h_r_7 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp4_h_r_15 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp4_h_r_23 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp4_h_r_7 lc_trk_g0_7 @@ -1355,11 +1201,9 @@ (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp4_v_b_7 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp4_v_t_2 lc_trk_g0_7 (22 3) Enable bit of Mux _local_links/g0_mux_6 => bnr_op_6 lc_trk_g0_6 -(22 3) Enable bit of Mux _local_links/g0_mux_6 => bot_op_6 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => glb2local_2 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => lft_op_6 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp12_h_l_5 lc_trk_g0_6 -(22 3) Enable bit of Mux _local_links/g0_mux_6 => sp12_h_r_14 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp12_h_r_22 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_h_l_11 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_h_l_3 lc_trk_g0_6 @@ -1368,7 +1212,6 @@ (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_v_b_14 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_v_b_6 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_v_t_11 lc_trk_g0_6 -(22 4) Enable bit of Mux _local_links/g1_mux_3 => bnr_op_3 lc_trk_g1_3 (22 4) Enable bit of Mux _local_links/g1_mux_3 => lft_op_3 lc_trk_g1_3 (22 4) Enable bit of Mux _local_links/g1_mux_3 => sp12_h_l_16 lc_trk_g1_3 (22 4) Enable bit of Mux _local_links/g1_mux_3 => sp12_h_r_11 lc_trk_g1_3 @@ -1395,7 +1238,6 @@ (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_v_b_10 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_v_b_2 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_v_t_7 lc_trk_g1_2 -(22 6) Enable bit of Mux _local_links/g1_mux_7 => bnr_op_7 lc_trk_g1_7 (22 6) Enable bit of Mux _local_links/g1_mux_7 => lft_op_7 lc_trk_g1_7 (22 6) Enable bit of Mux _local_links/g1_mux_7 => sp12_h_l_12 lc_trk_g1_7 (22 6) Enable bit of Mux _local_links/g1_mux_7 => sp12_h_l_20 lc_trk_g1_7 @@ -1409,26 +1251,19 @@ (22 6) Enable bit of Mux _local_links/g1_mux_7 => sp4_v_b_7 lc_trk_g1_7 (22 6) Enable bit of Mux _local_links/g1_mux_7 => sp4_v_t_2 lc_trk_g1_7 (22 7) Enable bit of Mux _local_links/g1_mux_6 => bnr_op_6 lc_trk_g1_6 -(22 7) Enable bit of Mux _local_links/g1_mux_6 => bot_op_6 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => lft_op_6 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp12_h_l_5 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp12_h_r_14 lc_trk_g1_6 -(22 7) Enable bit of Mux _local_links/g1_mux_6 => sp12_h_r_22 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_h_l_11 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_h_l_3 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_h_r_6 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_r_v_b_30 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_r_v_b_6 lc_trk_g1_6 -(22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_v_b_14 lc_trk_g1_6 -(22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_v_b_6 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_v_t_11 lc_trk_g1_6 (22 8) Enable bit of Mux _local_links/g2_mux_3 => bnl_op_3 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => rgt_op_3 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp12_v_b_19 lc_trk_g2_3 -(22 8) Enable bit of Mux _local_links/g2_mux_3 => sp12_v_b_3 lc_trk_g2_3 -(22 8) Enable bit of Mux _local_links/g2_mux_3 => sp12_v_t_8 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_h_l_14 lc_trk_g2_3 -(22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_h_l_22 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_h_r_43 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_r_v_b_11 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_r_v_b_35 lc_trk_g2_3 @@ -1451,17 +1286,14 @@ (22 9) Enable bit of Mux _local_links/g2_mux_2 => sp4_v_t_15 lc_trk_g2_2 (22 9) Enable bit of Mux _local_links/g2_mux_2 => sp4_v_t_31 lc_trk_g2_2 (22 9) Enable bit of Mux _local_links/g2_mux_2 => tnl_op_2 lc_trk_g2_2 -(22 9) Enable bit of Mux _local_links/g2_mux_2 => tnr_op_2 lc_trk_g2_2 (23 0) routing sp12_h_l_16 <X> lc_trk_g0_3 (23 0) routing sp12_h_r_11 <X> lc_trk_g0_3 (23 0) routing sp4_h_l_6 <X> lc_trk_g0_3 -(23 0) routing sp4_h_r_11 <X> lc_trk_g0_3 (23 0) routing sp4_h_r_3 <X> lc_trk_g0_3 (23 0) routing sp4_v_b_11 <X> lc_trk_g0_3 (23 0) routing sp4_v_b_3 <X> lc_trk_g0_3 (23 0) routing sp4_v_t_6 <X> lc_trk_g0_3 (23 1) routing sp12_h_l_17 <X> lc_trk_g0_2 -(23 1) routing sp12_h_l_9 <X> lc_trk_g0_2 (23 1) routing sp4_h_r_10 <X> lc_trk_g0_2 (23 1) routing sp4_h_r_18 <X> lc_trk_g0_2 (23 1) routing sp4_h_r_2 <X> lc_trk_g0_2 @@ -1469,8 +1301,6 @@ (23 1) routing sp4_v_b_2 <X> lc_trk_g0_2 (23 1) routing sp4_v_t_7 <X> lc_trk_g0_2 (23 10) routing sp12_v_t_12 <X> lc_trk_g2_7 -(23 10) routing sp12_v_t_20 <X> lc_trk_g2_7 -(23 10) routing sp4_h_l_26 <X> lc_trk_g2_7 (23 10) routing sp4_h_r_31 <X> lc_trk_g2_7 (23 10) routing sp4_h_r_47 <X> lc_trk_g2_7 (23 10) routing sp4_v_b_31 <X> lc_trk_g2_7 @@ -1504,7 +1334,6 @@ (23 14) routing sp12_v_t_20 <X> lc_trk_g3_7 (23 14) routing sp4_h_l_26 <X> lc_trk_g3_7 (23 14) routing sp4_h_r_31 <X> lc_trk_g3_7 -(23 14) routing sp4_h_r_47 <X> lc_trk_g3_7 (23 14) routing sp4_v_b_31 <X> lc_trk_g3_7 (23 14) routing sp4_v_t_26 <X> lc_trk_g3_7 (23 14) routing sp4_v_t_34 <X> lc_trk_g3_7 @@ -1513,7 +1342,6 @@ (23 15) routing sp4_h_l_19 <X> lc_trk_g3_6 (23 15) routing sp4_h_l_27 <X> lc_trk_g3_6 (23 15) routing sp4_h_r_46 <X> lc_trk_g3_6 -(23 15) routing sp4_v_b_46 <X> lc_trk_g3_6 (23 15) routing sp4_v_t_19 <X> lc_trk_g3_6 (23 15) routing sp4_v_t_27 <X> lc_trk_g3_6 (23 2) routing sp12_h_l_12 <X> lc_trk_g0_7 @@ -1524,7 +1352,6 @@ (23 2) routing sp4_v_b_23 <X> lc_trk_g0_7 (23 2) routing sp4_v_b_7 <X> lc_trk_g0_7 (23 2) routing sp4_v_t_2 <X> lc_trk_g0_7 -(23 3) routing sp12_h_r_14 <X> lc_trk_g0_6 (23 3) routing sp12_h_r_22 <X> lc_trk_g0_6 (23 3) routing sp4_h_l_11 <X> lc_trk_g0_6 (23 3) routing sp4_h_l_3 <X> lc_trk_g0_6 @@ -1557,17 +1384,12 @@ (23 6) routing sp4_v_b_7 <X> lc_trk_g1_7 (23 6) routing sp4_v_t_2 <X> lc_trk_g1_7 (23 7) routing sp12_h_r_14 <X> lc_trk_g1_6 -(23 7) routing sp12_h_r_22 <X> lc_trk_g1_6 (23 7) routing sp4_h_l_11 <X> lc_trk_g1_6 (23 7) routing sp4_h_l_3 <X> lc_trk_g1_6 (23 7) routing sp4_h_r_6 <X> lc_trk_g1_6 -(23 7) routing sp4_v_b_14 <X> lc_trk_g1_6 -(23 7) routing sp4_v_b_6 <X> lc_trk_g1_6 (23 7) routing sp4_v_t_11 <X> lc_trk_g1_6 (23 8) routing sp12_v_b_19 <X> lc_trk_g2_3 -(23 8) routing sp12_v_t_8 <X> lc_trk_g2_3 (23 8) routing sp4_h_l_14 <X> lc_trk_g2_3 -(23 8) routing sp4_h_l_22 <X> lc_trk_g2_3 (23 8) routing sp4_h_r_43 <X> lc_trk_g2_3 (23 8) routing sp4_v_b_27 <X> lc_trk_g2_3 (23 8) routing sp4_v_b_35 <X> lc_trk_g2_3 @@ -1583,10 +1405,8 @@ (24 0) routing lft_op_3 <X> lc_trk_g0_3 (24 0) routing sp12_h_r_3 <X> lc_trk_g0_3 (24 0) routing sp4_h_l_6 <X> lc_trk_g0_3 -(24 0) routing sp4_h_r_11 <X> lc_trk_g0_3 (24 0) routing sp4_h_r_3 <X> lc_trk_g0_3 (24 0) routing sp4_v_t_6 <X> lc_trk_g0_3 -(24 1) routing bot_op_2 <X> lc_trk_g0_2 (24 1) routing lft_op_2 <X> lc_trk_g0_2 (24 1) routing sp12_h_l_1 <X> lc_trk_g0_2 (24 1) routing sp4_h_r_10 <X> lc_trk_g0_2 @@ -1595,12 +1415,9 @@ (24 1) routing sp4_v_t_7 <X> lc_trk_g0_2 (24 10) routing rgt_op_7 <X> lc_trk_g2_7 (24 10) routing sp12_v_t_4 <X> lc_trk_g2_7 -(24 10) routing sp4_h_l_26 <X> lc_trk_g2_7 (24 10) routing sp4_h_r_31 <X> lc_trk_g2_7 (24 10) routing sp4_h_r_47 <X> lc_trk_g2_7 (24 10) routing sp4_v_t_34 <X> lc_trk_g2_7 -(24 10) routing tnl_op_7 <X> lc_trk_g2_7 -(24 10) routing tnr_op_7 <X> lc_trk_g2_7 (24 11) routing rgt_op_6 <X> lc_trk_g2_6 (24 11) routing sp12_v_t_5 <X> lc_trk_g2_6 (24 11) routing sp4_h_l_19 <X> lc_trk_g2_6 @@ -1615,8 +1432,6 @@ (24 12) routing sp4_h_l_22 <X> lc_trk_g3_3 (24 12) routing sp4_h_r_43 <X> lc_trk_g3_3 (24 12) routing sp4_v_b_43 <X> lc_trk_g3_3 -(24 12) routing tnl_op_3 <X> lc_trk_g3_3 -(24 12) routing tnr_op_3 <X> lc_trk_g3_3 (24 13) routing rgt_op_2 <X> lc_trk_g3_2 (24 13) routing sp12_v_t_1 <X> lc_trk_g3_2 (24 13) routing sp4_h_l_15 <X> lc_trk_g3_2 @@ -1624,30 +1439,24 @@ (24 13) routing sp4_h_r_42 <X> lc_trk_g3_2 (24 13) routing sp4_v_t_31 <X> lc_trk_g3_2 (24 13) routing tnl_op_2 <X> lc_trk_g3_2 -(24 13) routing tnr_op_2 <X> lc_trk_g3_2 (24 14) routing rgt_op_7 <X> lc_trk_g3_7 (24 14) routing sp12_v_t_4 <X> lc_trk_g3_7 (24 14) routing sp4_h_l_26 <X> lc_trk_g3_7 (24 14) routing sp4_h_r_31 <X> lc_trk_g3_7 -(24 14) routing sp4_h_r_47 <X> lc_trk_g3_7 (24 14) routing sp4_v_t_34 <X> lc_trk_g3_7 (24 14) routing tnl_op_7 <X> lc_trk_g3_7 -(24 14) routing tnr_op_7 <X> lc_trk_g3_7 (24 15) routing rgt_op_6 <X> lc_trk_g3_6 (24 15) routing sp12_v_t_5 <X> lc_trk_g3_6 (24 15) routing sp4_h_l_19 <X> lc_trk_g3_6 (24 15) routing sp4_h_l_27 <X> lc_trk_g3_6 (24 15) routing sp4_h_r_46 <X> lc_trk_g3_6 -(24 15) routing sp4_v_b_46 <X> lc_trk_g3_6 (24 15) routing tnl_op_6 <X> lc_trk_g3_6 (24 15) routing tnr_op_6 <X> lc_trk_g3_6 (24 2) routing lft_op_7 <X> lc_trk_g0_7 -(24 2) routing sp12_h_r_7 <X> lc_trk_g0_7 (24 2) routing sp4_h_r_15 <X> lc_trk_g0_7 (24 2) routing sp4_h_r_23 <X> lc_trk_g0_7 (24 2) routing sp4_h_r_7 <X> lc_trk_g0_7 (24 2) routing sp4_v_b_23 <X> lc_trk_g0_7 -(24 3) routing bot_op_6 <X> lc_trk_g0_6 (24 3) routing lft_op_6 <X> lc_trk_g0_6 (24 3) routing sp12_h_l_5 <X> lc_trk_g0_6 (24 3) routing sp4_h_l_11 <X> lc_trk_g0_6 @@ -1673,7 +1482,6 @@ (24 6) routing sp4_h_r_23 <X> lc_trk_g1_7 (24 6) routing sp4_h_r_7 <X> lc_trk_g1_7 (24 6) routing sp4_v_b_23 <X> lc_trk_g1_7 -(24 7) routing bot_op_6 <X> lc_trk_g1_6 (24 7) routing lft_op_6 <X> lc_trk_g1_6 (24 7) routing sp12_h_l_5 <X> lc_trk_g1_6 (24 7) routing sp4_h_l_11 <X> lc_trk_g1_6 @@ -1681,9 +1489,7 @@ (24 7) routing sp4_h_r_6 <X> lc_trk_g1_6 (24 7) routing sp4_v_t_11 <X> lc_trk_g1_6 (24 8) routing rgt_op_3 <X> lc_trk_g2_3 -(24 8) routing sp12_v_b_3 <X> lc_trk_g2_3 (24 8) routing sp4_h_l_14 <X> lc_trk_g2_3 -(24 8) routing sp4_h_l_22 <X> lc_trk_g2_3 (24 8) routing sp4_h_r_43 <X> lc_trk_g2_3 (24 8) routing sp4_v_b_43 <X> lc_trk_g2_3 (24 8) routing tnl_op_3 <X> lc_trk_g2_3 @@ -1695,7 +1501,6 @@ (24 9) routing sp4_h_r_42 <X> lc_trk_g2_2 (24 9) routing sp4_v_t_31 <X> lc_trk_g2_2 (24 9) routing tnl_op_2 <X> lc_trk_g2_2 -(24 9) routing tnr_op_2 <X> lc_trk_g2_2 (25 0) routing bnr_op_2 <X> lc_trk_g0_2 (25 0) routing lft_op_2 <X> lc_trk_g0_2 (25 0) routing sp12_h_l_1 <X> lc_trk_g0_2 @@ -1788,15 +1593,11 @@ (25 6) routing sp12_h_l_5 <X> lc_trk_g1_6 (25 6) routing sp4_h_l_11 <X> lc_trk_g1_6 (25 6) routing sp4_h_l_3 <X> lc_trk_g1_6 -(25 6) routing sp4_v_b_14 <X> lc_trk_g1_6 -(25 6) routing sp4_v_b_6 <X> lc_trk_g1_6 (25 7) routing bnr_op_6 <X> lc_trk_g1_6 (25 7) routing sp12_h_l_5 <X> lc_trk_g1_6 -(25 7) routing sp12_h_r_22 <X> lc_trk_g1_6 (25 7) routing sp4_h_l_11 <X> lc_trk_g1_6 (25 7) routing sp4_h_r_6 <X> lc_trk_g1_6 (25 7) routing sp4_r_v_b_30 <X> lc_trk_g1_6 -(25 7) routing sp4_v_b_14 <X> lc_trk_g1_6 (25 8) routing bnl_op_2 <X> lc_trk_g2_2 (25 8) routing rgt_op_2 <X> lc_trk_g2_2 (25 8) routing sp12_v_t_1 <X> lc_trk_g2_2 @@ -1941,11 +1742,8 @@ (26 9) routing lc_trk_g3_3 <X> input0_4 (26 9) routing lc_trk_g3_7 <X> input0_4 (27 0) routing lc_trk_g1_0 <X> wire_bram/ram/WDATA_15 -(27 0) routing lc_trk_g1_2 <X> wire_bram/ram/WDATA_15 (27 0) routing lc_trk_g1_4 <X> wire_bram/ram/WDATA_15 -(27 0) routing lc_trk_g1_6 <X> wire_bram/ram/WDATA_15 (27 0) routing lc_trk_g3_0 <X> wire_bram/ram/WDATA_15 -(27 0) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_15 (27 0) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_15 (27 0) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_15 (27 1) routing lc_trk_g1_1 <X> input0_0 @@ -1956,14 +1754,10 @@ (27 1) routing lc_trk_g3_3 <X> input0_0 (27 1) routing lc_trk_g3_5 <X> input0_0 (27 1) routing lc_trk_g3_7 <X> input0_0 -(27 10) routing lc_trk_g1_1 <X> wire_bram/ram/WDATA_10 -(27 10) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_10 (27 10) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_10 -(27 10) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_10 (27 10) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_10 (27 10) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_10 (27 10) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_10 -(27 10) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_10 (27 11) routing lc_trk_g1_0 <X> input0_5 (27 11) routing lc_trk_g1_2 <X> input0_5 (27 11) routing lc_trk_g1_4 <X> input0_5 @@ -1990,12 +1784,8 @@ (27 13) routing lc_trk_g3_7 <X> input0_6 (27 14) routing lc_trk_g1_1 <X> wire_bram/ram/WDATA_8 (27 14) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_8 -(27 14) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_8 -(27 14) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_8 (27 14) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_8 (27 14) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_8 -(27 14) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_8 -(27 14) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_8 (27 15) routing lc_trk_g1_0 <X> input0_7 (27 15) routing lc_trk_g1_2 <X> input0_7 (27 15) routing lc_trk_g1_4 <X> input0_7 @@ -2006,12 +1796,9 @@ (27 15) routing lc_trk_g3_6 <X> input0_7 (27 2) routing lc_trk_g1_1 <X> wire_bram/ram/WDATA_14 (27 2) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_14 -(27 2) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_14 (27 2) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_14 (27 2) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_14 (27 2) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_14 -(27 2) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_14 -(27 2) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_14 (27 3) routing lc_trk_g1_0 <X> input0_1 (27 3) routing lc_trk_g1_2 <X> input0_1 (27 3) routing lc_trk_g1_4 <X> input0_1 @@ -2036,10 +1823,7 @@ (27 5) routing lc_trk_g3_3 <X> input0_2 (27 5) routing lc_trk_g3_5 <X> input0_2 (27 5) routing lc_trk_g3_7 <X> input0_2 -(27 6) routing lc_trk_g1_1 <X> wire_bram/ram/WDATA_12 -(27 6) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_12 (27 6) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_12 -(27 6) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_12 (27 6) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_12 (27 6) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_12 (27 6) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_12 @@ -2053,12 +1837,10 @@ (27 7) routing lc_trk_g3_4 <X> input0_3 (27 7) routing lc_trk_g3_6 <X> input0_3 (27 8) routing lc_trk_g1_0 <X> wire_bram/ram/WDATA_11 -(27 8) routing lc_trk_g1_2 <X> wire_bram/ram/WDATA_11 (27 8) routing lc_trk_g1_4 <X> wire_bram/ram/WDATA_11 (27 8) routing lc_trk_g1_6 <X> wire_bram/ram/WDATA_11 (27 8) routing lc_trk_g3_0 <X> wire_bram/ram/WDATA_11 (27 8) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_11 -(27 8) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_11 (27 8) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_11 (27 9) routing lc_trk_g1_1 <X> input0_4 (27 9) routing lc_trk_g1_3 <X> input0_4 @@ -2070,10 +1852,8 @@ (27 9) routing lc_trk_g3_7 <X> input0_4 (28 0) routing lc_trk_g2_1 <X> wire_bram/ram/WDATA_15 (28 0) routing lc_trk_g2_3 <X> wire_bram/ram/WDATA_15 -(28 0) routing lc_trk_g2_5 <X> wire_bram/ram/WDATA_15 (28 0) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_15 (28 0) routing lc_trk_g3_0 <X> wire_bram/ram/WDATA_15 -(28 0) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_15 (28 0) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_15 (28 0) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_15 (28 1) routing lc_trk_g2_0 <X> input0_0 @@ -2084,14 +1864,10 @@ (28 1) routing lc_trk_g3_3 <X> input0_0 (28 1) routing lc_trk_g3_5 <X> input0_0 (28 1) routing lc_trk_g3_7 <X> input0_0 -(28 10) routing lc_trk_g2_0 <X> wire_bram/ram/WDATA_10 (28 10) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_10 -(28 10) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_10 -(28 10) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_10 (28 10) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_10 (28 10) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_10 (28 10) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_10 -(28 10) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_10 (28 11) routing lc_trk_g2_1 <X> input0_5 (28 11) routing lc_trk_g2_3 <X> input0_5 (28 11) routing lc_trk_g2_5 <X> input0_5 @@ -2119,11 +1895,8 @@ (28 14) routing lc_trk_g2_0 <X> wire_bram/ram/WDATA_8 (28 14) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_8 (28 14) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_8 -(28 14) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_8 (28 14) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_8 (28 14) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_8 -(28 14) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_8 -(28 14) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_8 (28 15) routing lc_trk_g2_1 <X> input0_7 (28 15) routing lc_trk_g2_3 <X> input0_7 (28 15) routing lc_trk_g2_5 <X> input0_7 @@ -2133,13 +1906,10 @@ (28 15) routing lc_trk_g3_4 <X> input0_7 (28 15) routing lc_trk_g3_6 <X> input0_7 (28 2) routing lc_trk_g2_0 <X> wire_bram/ram/WDATA_14 -(28 2) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_14 (28 2) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_14 (28 2) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_14 (28 2) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_14 (28 2) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_14 -(28 2) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_14 -(28 2) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_14 (28 3) routing lc_trk_g2_1 <X> input0_1 (28 3) routing lc_trk_g2_3 <X> input0_1 (28 3) routing lc_trk_g2_5 <X> input0_1 @@ -2166,7 +1936,6 @@ (28 5) routing lc_trk_g3_7 <X> input0_2 (28 6) routing lc_trk_g2_0 <X> wire_bram/ram/WDATA_12 (28 6) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_12 -(28 6) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_12 (28 6) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_12 (28 6) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_12 (28 6) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_12 @@ -2180,13 +1949,11 @@ (28 7) routing lc_trk_g3_2 <X> input0_3 (28 7) routing lc_trk_g3_4 <X> input0_3 (28 7) routing lc_trk_g3_6 <X> input0_3 -(28 8) routing lc_trk_g2_1 <X> wire_bram/ram/WDATA_11 (28 8) routing lc_trk_g2_3 <X> wire_bram/ram/WDATA_11 (28 8) routing lc_trk_g2_5 <X> wire_bram/ram/WDATA_11 (28 8) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_11 (28 8) routing lc_trk_g3_0 <X> wire_bram/ram/WDATA_11 (28 8) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_11 -(28 8) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_11 (28 8) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_11 (28 9) routing lc_trk_g2_0 <X> input0_4 (28 9) routing lc_trk_g2_2 <X> input0_4 @@ -2198,18 +1965,12 @@ (28 9) routing lc_trk_g3_7 <X> input0_4 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g0_1 wire_bram/ram/WDATA_15 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g0_3 wire_bram/ram/WDATA_15 -(29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g0_5 wire_bram/ram/WDATA_15 -(29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g0_7 wire_bram/ram/WDATA_15 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g1_0 wire_bram/ram/WDATA_15 -(29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g1_2 wire_bram/ram/WDATA_15 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g1_4 wire_bram/ram/WDATA_15 -(29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g1_6 wire_bram/ram/WDATA_15 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g2_1 wire_bram/ram/WDATA_15 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g2_3 wire_bram/ram/WDATA_15 -(29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g2_5 wire_bram/ram/WDATA_15 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g2_7 wire_bram/ram/WDATA_15 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g3_0 wire_bram/ram/WDATA_15 -(29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g3_2 wire_bram/ram/WDATA_15 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g3_4 wire_bram/ram/WDATA_15 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g3_6 wire_bram/ram/WDATA_15 (29 1) Enable bit of Mux _bram/lcb0_0 => lc_trk_g0_0 input0_0 @@ -2232,18 +1993,11 @@ (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g0_2 wire_bram/ram/WDATA_10 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g0_4 wire_bram/ram/WDATA_10 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g0_6 wire_bram/ram/WDATA_10 -(29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g1_1 wire_bram/ram/WDATA_10 -(29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g1_3 wire_bram/ram/WDATA_10 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g1_5 wire_bram/ram/WDATA_10 -(29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g1_7 wire_bram/ram/WDATA_10 -(29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g2_0 wire_bram/ram/WDATA_10 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g2_2 wire_bram/ram/WDATA_10 -(29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g2_4 wire_bram/ram/WDATA_10 -(29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g2_6 wire_bram/ram/WDATA_10 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g3_1 wire_bram/ram/WDATA_10 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g3_3 wire_bram/ram/WDATA_10 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g3_5 wire_bram/ram/WDATA_10 -(29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g3_7 wire_bram/ram/WDATA_10 (29 11) Enable bit of Mux _bram/lcb0_5 => lc_trk_g0_1 input0_5 (29 11) Enable bit of Mux _bram/lcb0_5 => lc_trk_g0_3 input0_5 (29 11) Enable bit of Mux _bram/lcb0_5 => lc_trk_g0_5 input0_5 @@ -2293,21 +2047,15 @@ (29 13) Enable bit of Mux _bram/lcb0_6 => lc_trk_g3_5 input0_6 (29 13) Enable bit of Mux _bram/lcb0_6 => lc_trk_g3_7 input0_6 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g0_0 wire_bram/ram/WDATA_8 -(29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g0_2 wire_bram/ram/WDATA_8 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g0_4 wire_bram/ram/WDATA_8 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g0_6 wire_bram/ram/WDATA_8 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g1_1 wire_bram/ram/WDATA_8 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g1_3 wire_bram/ram/WDATA_8 -(29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g1_5 wire_bram/ram/WDATA_8 -(29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g1_7 wire_bram/ram/WDATA_8 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g2_0 wire_bram/ram/WDATA_8 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g2_2 wire_bram/ram/WDATA_8 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g2_4 wire_bram/ram/WDATA_8 -(29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g2_6 wire_bram/ram/WDATA_8 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g3_1 wire_bram/ram/WDATA_8 (29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g3_3 wire_bram/ram/WDATA_8 -(29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g3_5 wire_bram/ram/WDATA_8 -(29 14) Enable bit of Mux _bram/lcb1_7 => lc_trk_g3_7 wire_bram/ram/WDATA_8 (29 15) Enable bit of Mux _bram/lcb0_7 => lc_trk_g0_1 input0_7 (29 15) Enable bit of Mux _bram/lcb0_7 => lc_trk_g0_3 input0_7 (29 15) Enable bit of Mux _bram/lcb0_7 => lc_trk_g0_5 input0_7 @@ -2325,21 +2073,16 @@ (29 15) Enable bit of Mux _bram/lcb0_7 => lc_trk_g3_4 input0_7 (29 15) Enable bit of Mux _bram/lcb0_7 => lc_trk_g3_6 input0_7 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g0_0 wire_bram/ram/WDATA_14 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g0_2 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g0_4 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g0_6 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g1_1 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g1_3 wire_bram/ram/WDATA_14 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g1_5 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g1_7 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g2_0 wire_bram/ram/WDATA_14 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g2_2 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g2_4 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g2_6 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g3_1 wire_bram/ram/WDATA_14 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g3_3 wire_bram/ram/WDATA_14 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g3_5 wire_bram/ram/WDATA_14 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g3_7 wire_bram/ram/WDATA_14 (29 3) Enable bit of Mux _bram/lcb0_1 => lc_trk_g0_1 input0_1 (29 3) Enable bit of Mux _bram/lcb0_1 => lc_trk_g0_3 input0_1 (29 3) Enable bit of Mux _bram/lcb0_1 => lc_trk_g0_5 input0_1 @@ -2390,15 +2133,9 @@ (29 5) Enable bit of Mux _bram/lcb0_2 => lc_trk_g3_7 input0_2 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g0_0 wire_bram/ram/WDATA_12 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g0_2 wire_bram/ram/WDATA_12 -(29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g0_4 wire_bram/ram/WDATA_12 -(29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g0_6 wire_bram/ram/WDATA_12 -(29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g1_1 wire_bram/ram/WDATA_12 -(29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g1_3 wire_bram/ram/WDATA_12 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g1_5 wire_bram/ram/WDATA_12 -(29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g1_7 wire_bram/ram/WDATA_12 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g2_0 wire_bram/ram/WDATA_12 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g2_2 wire_bram/ram/WDATA_12 -(29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g2_4 wire_bram/ram/WDATA_12 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g2_6 wire_bram/ram/WDATA_12 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g3_1 wire_bram/ram/WDATA_12 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g3_3 wire_bram/ram/WDATA_12 @@ -2421,20 +2158,15 @@ (29 7) Enable bit of Mux _bram/lcb0_3 => lc_trk_g3_4 input0_3 (29 7) Enable bit of Mux _bram/lcb0_3 => lc_trk_g3_6 input0_3 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g0_1 wire_bram/ram/WDATA_11 -(29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g0_3 wire_bram/ram/WDATA_11 -(29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g0_5 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g0_7 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g1_0 wire_bram/ram/WDATA_11 -(29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g1_2 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g1_4 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g1_6 wire_bram/ram/WDATA_11 -(29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g2_1 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g2_3 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g2_5 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g2_7 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g3_0 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g3_2 wire_bram/ram/WDATA_11 -(29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g3_4 wire_bram/ram/WDATA_11 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g3_6 wire_bram/ram/WDATA_11 (29 9) Enable bit of Mux _bram/lcb0_4 => lc_trk_g0_0 input0_4 (29 9) Enable bit of Mux _bram/lcb0_4 => lc_trk_g0_2 input0_4 @@ -2484,38 +2216,22 @@ (3 8) routing sp12_v_t_22 <X> sp12_v_b_1 (3 9) routing sp12_h_l_22 <X> sp12_v_b_1 (3 9) routing sp12_h_r_1 <X> sp12_v_b_1 -(30 0) routing lc_trk_g0_5 <X> wire_bram/ram/WDATA_15 -(30 0) routing lc_trk_g0_7 <X> wire_bram/ram/WDATA_15 (30 0) routing lc_trk_g1_4 <X> wire_bram/ram/WDATA_15 -(30 0) routing lc_trk_g1_6 <X> wire_bram/ram/WDATA_15 -(30 0) routing lc_trk_g2_5 <X> wire_bram/ram/WDATA_15 (30 0) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_15 (30 0) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_15 (30 0) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_15 (30 1) routing lc_trk_g0_3 <X> wire_bram/ram/WDATA_15 -(30 1) routing lc_trk_g0_7 <X> wire_bram/ram/WDATA_15 -(30 1) routing lc_trk_g1_2 <X> wire_bram/ram/WDATA_15 -(30 1) routing lc_trk_g1_6 <X> wire_bram/ram/WDATA_15 (30 1) routing lc_trk_g2_3 <X> wire_bram/ram/WDATA_15 (30 1) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_15 -(30 1) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_15 (30 1) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_15 (30 10) routing lc_trk_g0_4 <X> wire_bram/ram/WDATA_10 (30 10) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_10 (30 10) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_10 -(30 10) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_10 -(30 10) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_10 -(30 10) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_10 (30 10) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_10 -(30 10) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_10 (30 11) routing lc_trk_g0_2 <X> wire_bram/ram/WDATA_10 (30 11) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_10 -(30 11) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_10 -(30 11) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_10 (30 11) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_10 -(30 11) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_10 (30 11) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_10 -(30 11) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_10 (30 12) routing lc_trk_g0_5 <X> wire_bram/ram/WDATA_9 (30 12) routing lc_trk_g0_7 <X> wire_bram/ram/WDATA_9 (30 12) routing lc_trk_g1_4 <X> wire_bram/ram/WDATA_9 @@ -2534,36 +2250,21 @@ (30 13) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_9 (30 14) routing lc_trk_g0_4 <X> wire_bram/ram/WDATA_8 (30 14) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_8 -(30 14) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_8 -(30 14) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_8 (30 14) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_8 -(30 14) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_8 -(30 14) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_8 -(30 14) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_8 -(30 15) routing lc_trk_g0_2 <X> wire_bram/ram/WDATA_8 (30 15) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_8 (30 15) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_8 -(30 15) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_8 (30 15) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_8 -(30 15) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_8 (30 15) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_8 -(30 15) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_8 (30 2) routing lc_trk_g0_4 <X> wire_bram/ram/WDATA_14 (30 2) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_14 -(30 2) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_14 (30 2) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_14 (30 2) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_14 (30 2) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_14 -(30 2) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_14 -(30 2) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_14 -(30 3) routing lc_trk_g0_2 <X> wire_bram/ram/WDATA_14 (30 3) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_14 (30 3) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_14 (30 3) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_14 -(30 3) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_14 (30 3) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_14 (30 3) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_14 -(30 3) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_14 (30 4) routing lc_trk_g0_5 <X> wire_bram/ram/WDATA_13 (30 4) routing lc_trk_g0_7 <X> wire_bram/ram/WDATA_13 (30 4) routing lc_trk_g1_4 <X> wire_bram/ram/WDATA_13 @@ -2580,33 +2281,22 @@ (30 5) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_13 (30 5) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_13 (30 5) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_13 -(30 6) routing lc_trk_g0_4 <X> wire_bram/ram/WDATA_12 -(30 6) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_12 (30 6) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_12 -(30 6) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_12 -(30 6) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_12 (30 6) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_12 (30 6) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_12 (30 6) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_12 (30 7) routing lc_trk_g0_2 <X> wire_bram/ram/WDATA_12 -(30 7) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_12 -(30 7) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_12 -(30 7) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_12 (30 7) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_12 (30 7) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_12 (30 7) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_12 (30 7) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_12 -(30 8) routing lc_trk_g0_5 <X> wire_bram/ram/WDATA_11 (30 8) routing lc_trk_g0_7 <X> wire_bram/ram/WDATA_11 (30 8) routing lc_trk_g1_4 <X> wire_bram/ram/WDATA_11 (30 8) routing lc_trk_g1_6 <X> wire_bram/ram/WDATA_11 (30 8) routing lc_trk_g2_5 <X> wire_bram/ram/WDATA_11 (30 8) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_11 -(30 8) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_11 (30 8) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_11 -(30 9) routing lc_trk_g0_3 <X> wire_bram/ram/WDATA_11 (30 9) routing lc_trk_g0_7 <X> wire_bram/ram/WDATA_11 -(30 9) routing lc_trk_g1_2 <X> wire_bram/ram/WDATA_11 (30 9) routing lc_trk_g1_6 <X> wire_bram/ram/WDATA_11 (30 9) routing lc_trk_g2_3 <X> wire_bram/ram/WDATA_11 (30 9) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_11 @@ -2615,89 +2305,58 @@ (31 0) routing lc_trk_g0_5 <X> wire_bram/ram/MASK_15 (31 0) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_15 (31 0) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_15 -(31 0) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_15 (31 0) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_15 -(31 0) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_15 (31 0) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_15 -(31 0) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_15 (31 1) routing lc_trk_g0_3 <X> wire_bram/ram/MASK_15 (31 1) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_15 (31 1) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_15 -(31 1) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_15 (31 1) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_15 -(31 1) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_15 (31 1) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_15 -(31 1) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_15 (31 10) routing lc_trk_g0_4 <X> wire_bram/ram/MASK_10 -(31 10) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_10 -(31 10) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_10 (31 10) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_10 (31 10) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_10 -(31 10) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_10 -(31 10) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_10 (31 10) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_10 (31 11) routing lc_trk_g0_2 <X> wire_bram/ram/MASK_10 -(31 11) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_10 (31 11) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_10 (31 11) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_10 (31 11) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_10 -(31 11) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_10 (31 11) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_10 (31 11) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_10 -(31 12) routing lc_trk_g0_5 <X> wire_bram/ram/MASK_9 (31 12) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_9 (31 12) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_9 -(31 12) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_9 (31 12) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_9 -(31 12) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_9 -(31 12) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_9 (31 12) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_9 (31 13) routing lc_trk_g0_3 <X> wire_bram/ram/MASK_9 (31 13) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_9 (31 13) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_9 -(31 13) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_9 -(31 13) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_9 -(31 13) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_9 (31 13) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_9 (31 13) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_9 (31 14) routing lc_trk_g0_4 <X> wire_bram/ram/MASK_8 (31 14) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_8 -(31 14) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_8 -(31 14) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_8 (31 14) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_8 (31 14) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_8 -(31 14) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_8 (31 14) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_8 (31 15) routing lc_trk_g0_2 <X> wire_bram/ram/MASK_8 (31 15) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_8 -(31 15) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_8 -(31 15) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_8 (31 15) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_8 (31 15) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_8 -(31 15) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_8 (31 15) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_8 (31 2) routing lc_trk_g0_4 <X> wire_bram/ram/MASK_14 (31 2) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_14 -(31 2) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_14 (31 2) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_14 (31 2) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_14 (31 2) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_14 (31 2) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_14 (31 2) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_14 -(31 3) routing lc_trk_g0_2 <X> wire_bram/ram/MASK_14 (31 3) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_14 (31 3) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_14 (31 3) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_14 (31 3) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_14 (31 3) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_14 -(31 3) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_14 (31 3) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_14 -(31 4) routing lc_trk_g0_5 <X> wire_bram/ram/MASK_13 (31 4) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_13 (31 4) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_13 (31 4) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_13 -(31 4) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_13 -(31 4) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_13 (31 4) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_13 (31 4) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_13 (31 5) routing lc_trk_g0_3 <X> wire_bram/ram/MASK_13 @@ -2705,40 +2364,25 @@ (31 5) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_13 (31 5) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_13 (31 5) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_13 -(31 5) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_13 (31 5) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_13 (31 5) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_13 (31 6) routing lc_trk_g0_4 <X> wire_bram/ram/MASK_12 -(31 6) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_12 (31 6) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_12 (31 6) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_12 (31 6) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_12 -(31 6) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_12 -(31 6) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_12 (31 6) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_12 (31 7) routing lc_trk_g0_2 <X> wire_bram/ram/MASK_12 -(31 7) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_12 (31 7) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_12 (31 7) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_12 (31 7) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_12 -(31 7) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_12 -(31 7) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_12 (31 7) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_12 (31 8) routing lc_trk_g0_5 <X> wire_bram/ram/MASK_11 -(31 8) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_11 (31 8) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_11 -(31 8) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_11 (31 8) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_11 -(31 8) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_11 (31 8) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_11 (31 8) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_11 (31 9) routing lc_trk_g0_3 <X> wire_bram/ram/MASK_11 -(31 9) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_11 -(31 9) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_11 -(31 9) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_11 (31 9) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_11 -(31 9) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_11 -(31 9) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_11 (31 9) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_11 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g0_3 wire_bram/ram/MASK_15 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g0_5 wire_bram/ram/MASK_15 @@ -2746,60 +2390,39 @@ (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g1_0 wire_bram/ram/MASK_15 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g1_2 wire_bram/ram/MASK_15 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g1_4 wire_bram/ram/MASK_15 -(32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g1_6 wire_bram/ram/MASK_15 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g2_1 wire_bram/ram/MASK_15 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g2_3 wire_bram/ram/MASK_15 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g2_5 wire_bram/ram/MASK_15 -(32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g2_7 wire_bram/ram/MASK_15 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g3_0 wire_bram/ram/MASK_15 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g3_2 wire_bram/ram/MASK_15 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g3_4 wire_bram/ram/MASK_15 -(32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g3_6 wire_bram/ram/MASK_15 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g0_2 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g0_4 wire_bram/ram/MASK_10 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g0_6 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g1_1 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g1_3 wire_bram/ram/MASK_10 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g1_5 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g1_7 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g2_0 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g2_2 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g2_4 wire_bram/ram/MASK_10 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g2_6 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g3_1 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g3_3 wire_bram/ram/MASK_10 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g3_5 wire_bram/ram/MASK_10 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g3_7 wire_bram/ram/MASK_10 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g0_1 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g0_3 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g0_5 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g0_7 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g1_0 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g1_2 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g1_4 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g1_6 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g2_1 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g2_3 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g2_5 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g2_7 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g3_0 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g3_2 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g3_4 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g3_6 input2_5 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g0_3 wire_bram/ram/MASK_9 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g0_5 wire_bram/ram/MASK_9 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g0_7 wire_bram/ram/MASK_9 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g1_0 wire_bram/ram/MASK_9 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g1_2 wire_bram/ram/MASK_9 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g1_4 wire_bram/ram/MASK_9 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g1_6 wire_bram/ram/MASK_9 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g2_1 wire_bram/ram/MASK_9 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g2_3 wire_bram/ram/MASK_9 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g2_5 wire_bram/ram/MASK_9 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g2_7 wire_bram/ram/MASK_9 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g3_0 wire_bram/ram/MASK_9 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g3_2 wire_bram/ram/MASK_9 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g3_4 wire_bram/ram/MASK_9 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g3_6 wire_bram/ram/MASK_9 (32 13) Enable bit of Mux _bram/lcb2_6 => lc_trk_g0_0 input2_6 (32 13) Enable bit of Mux _bram/lcb2_6 => lc_trk_g0_2 input2_6 @@ -2821,16 +2444,10 @@ (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g0_4 wire_bram/ram/MASK_8 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g0_6 wire_bram/ram/MASK_8 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g1_1 wire_bram/ram/MASK_8 -(32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g1_3 wire_bram/ram/MASK_8 -(32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g1_5 wire_bram/ram/MASK_8 -(32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g1_7 wire_bram/ram/MASK_8 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g2_0 wire_bram/ram/MASK_8 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g2_2 wire_bram/ram/MASK_8 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g2_4 wire_bram/ram/MASK_8 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g2_6 wire_bram/ram/MASK_8 -(32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g3_1 wire_bram/ram/MASK_8 -(32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g3_3 wire_bram/ram/MASK_8 -(32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g3_5 wire_bram/ram/MASK_8 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g3_7 wire_bram/ram/MASK_8 (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g0_1 input2_7 (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g0_3 input2_7 @@ -2843,44 +2460,34 @@ (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g2_1 input2_7 (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g2_3 input2_7 (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g2_5 input2_7 -(32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g2_7 input2_7 (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g3_0 input2_7 (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g3_2 input2_7 (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g3_4 input2_7 (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g3_6 input2_7 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g0_2 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g0_4 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g0_6 wire_bram/ram/MASK_14 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g1_1 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g1_3 wire_bram/ram/MASK_14 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g1_5 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g1_7 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g2_0 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g2_2 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g2_4 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g2_6 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g3_1 wire_bram/ram/MASK_14 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g3_3 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g3_5 wire_bram/ram/MASK_14 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g3_7 wire_bram/ram/MASK_14 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g0_3 wire_bram/ram/MASK_13 -(32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g0_5 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g0_7 wire_bram/ram/MASK_13 -(32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g1_0 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g1_2 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g1_4 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g1_6 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g2_1 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g2_3 wire_bram/ram/MASK_13 -(32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g2_5 wire_bram/ram/MASK_13 -(32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g2_7 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g3_0 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g3_2 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g3_4 wire_bram/ram/MASK_13 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g3_6 wire_bram/ram/MASK_13 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g0_2 wire_bram/ram/MASK_12 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g0_4 wire_bram/ram/MASK_12 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g0_6 wire_bram/ram/MASK_12 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g1_1 wire_bram/ram/MASK_12 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g1_3 wire_bram/ram/MASK_12 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g1_5 wire_bram/ram/MASK_12 @@ -2888,57 +2495,37 @@ (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g2_0 wire_bram/ram/MASK_12 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g2_2 wire_bram/ram/MASK_12 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g2_4 wire_bram/ram/MASK_12 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g2_6 wire_bram/ram/MASK_12 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g3_1 wire_bram/ram/MASK_12 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g3_3 wire_bram/ram/MASK_12 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g3_5 wire_bram/ram/MASK_12 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g3_7 wire_bram/ram/MASK_12 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g0_3 wire_bram/ram/MASK_11 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g0_5 wire_bram/ram/MASK_11 -(32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g0_7 wire_bram/ram/MASK_11 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g1_0 wire_bram/ram/MASK_11 -(32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g1_2 wire_bram/ram/MASK_11 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g1_4 wire_bram/ram/MASK_11 -(32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g1_6 wire_bram/ram/MASK_11 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g2_1 wire_bram/ram/MASK_11 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g2_3 wire_bram/ram/MASK_11 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g2_5 wire_bram/ram/MASK_11 -(32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g2_7 wire_bram/ram/MASK_11 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g3_0 wire_bram/ram/MASK_11 -(32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g3_2 wire_bram/ram/MASK_11 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g3_4 wire_bram/ram/MASK_11 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g3_6 wire_bram/ram/MASK_11 (33 0) routing lc_trk_g2_1 <X> wire_bram/ram/MASK_15 (33 0) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_15 (33 0) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_15 -(33 0) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_15 (33 0) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_15 (33 0) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_15 (33 0) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_15 -(33 0) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_15 (33 10) routing lc_trk_g2_0 <X> wire_bram/ram/MASK_10 (33 10) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_10 (33 10) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_10 -(33 10) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_10 (33 10) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_10 (33 10) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_10 -(33 10) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_10 (33 10) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_10 -(33 11) routing lc_trk_g2_1 <X> input2_5 (33 11) routing lc_trk_g2_3 <X> input2_5 -(33 11) routing lc_trk_g2_5 <X> input2_5 -(33 11) routing lc_trk_g2_7 <X> input2_5 (33 11) routing lc_trk_g3_0 <X> input2_5 -(33 11) routing lc_trk_g3_2 <X> input2_5 (33 11) routing lc_trk_g3_4 <X> input2_5 (33 11) routing lc_trk_g3_6 <X> input2_5 (33 12) routing lc_trk_g2_1 <X> wire_bram/ram/MASK_9 -(33 12) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_9 (33 12) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_9 -(33 12) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_9 (33 12) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_9 (33 12) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_9 -(33 12) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_9 (33 12) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_9 (33 13) routing lc_trk_g2_0 <X> input2_6 (33 13) routing lc_trk_g2_2 <X> input2_6 @@ -2952,14 +2539,10 @@ (33 14) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_8 (33 14) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_8 (33 14) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_8 -(33 14) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_8 -(33 14) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_8 -(33 14) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_8 (33 14) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_8 (33 15) routing lc_trk_g2_1 <X> input2_7 (33 15) routing lc_trk_g2_3 <X> input2_7 (33 15) routing lc_trk_g2_5 <X> input2_7 -(33 15) routing lc_trk_g2_7 <X> input2_7 (33 15) routing lc_trk_g3_0 <X> input2_7 (33 15) routing lc_trk_g3_2 <X> input2_7 (33 15) routing lc_trk_g3_4 <X> input2_7 @@ -2969,13 +2552,10 @@ (33 2) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_14 (33 2) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_14 (33 2) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_14 -(33 2) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_14 (33 2) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_14 (33 2) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_14 (33 4) routing lc_trk_g2_1 <X> wire_bram/ram/MASK_13 (33 4) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_13 -(33 4) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_13 -(33 4) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_13 (33 4) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_13 (33 4) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_13 (33 4) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_13 @@ -2983,50 +2563,34 @@ (33 6) routing lc_trk_g2_0 <X> wire_bram/ram/MASK_12 (33 6) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_12 (33 6) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_12 -(33 6) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_12 -(33 6) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_12 -(33 6) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_12 -(33 6) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_12 (33 6) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_12 (33 8) routing lc_trk_g2_1 <X> wire_bram/ram/MASK_11 (33 8) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_11 (33 8) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_11 -(33 8) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_11 (33 8) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_11 -(33 8) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_11 (33 8) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_11 (33 8) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_11 (34 0) routing lc_trk_g1_0 <X> wire_bram/ram/MASK_15 (34 0) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_15 (34 0) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_15 -(34 0) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_15 (34 0) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_15 (34 0) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_15 (34 0) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_15 -(34 0) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_15 (34 10) routing lc_trk_g1_1 <X> wire_bram/ram/MASK_10 (34 10) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_10 -(34 10) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_10 (34 10) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_10 (34 10) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_10 (34 10) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_10 -(34 10) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_10 (34 10) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_10 (34 11) routing lc_trk_g1_0 <X> input2_5 -(34 11) routing lc_trk_g1_2 <X> input2_5 (34 11) routing lc_trk_g1_4 <X> input2_5 -(34 11) routing lc_trk_g1_6 <X> input2_5 (34 11) routing lc_trk_g3_0 <X> input2_5 -(34 11) routing lc_trk_g3_2 <X> input2_5 (34 11) routing lc_trk_g3_4 <X> input2_5 (34 11) routing lc_trk_g3_6 <X> input2_5 -(34 12) routing lc_trk_g1_0 <X> wire_bram/ram/MASK_9 (34 12) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_9 (34 12) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_9 -(34 12) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_9 (34 12) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_9 (34 12) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_9 -(34 12) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_9 (34 12) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_9 (34 13) routing lc_trk_g1_1 <X> input2_6 (34 13) routing lc_trk_g1_3 <X> input2_6 @@ -3037,12 +2601,6 @@ (34 13) routing lc_trk_g3_5 <X> input2_6 (34 13) routing lc_trk_g3_7 <X> input2_6 (34 14) routing lc_trk_g1_1 <X> wire_bram/ram/MASK_8 -(34 14) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_8 -(34 14) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_8 -(34 14) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_8 -(34 14) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_8 -(34 14) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_8 -(34 14) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_8 (34 14) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_8 (34 15) routing lc_trk_g1_0 <X> input2_7 (34 15) routing lc_trk_g1_2 <X> input2_7 @@ -3052,15 +2610,11 @@ (34 15) routing lc_trk_g3_2 <X> input2_7 (34 15) routing lc_trk_g3_4 <X> input2_7 (34 15) routing lc_trk_g3_6 <X> input2_7 -(34 2) routing lc_trk_g1_1 <X> wire_bram/ram/MASK_14 (34 2) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_14 -(34 2) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_14 (34 2) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_14 (34 2) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_14 -(34 2) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_14 (34 2) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_14 (34 2) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_14 -(34 4) routing lc_trk_g1_0 <X> wire_bram/ram/MASK_13 (34 4) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_13 (34 4) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_13 (34 4) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_13 @@ -3072,33 +2626,19 @@ (34 6) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_12 (34 6) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_12 (34 6) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_12 -(34 6) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_12 -(34 6) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_12 -(34 6) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_12 (34 6) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_12 (34 8) routing lc_trk_g1_0 <X> wire_bram/ram/MASK_11 -(34 8) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_11 (34 8) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_11 -(34 8) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_11 (34 8) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_11 -(34 8) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_11 (34 8) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_11 (34 8) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_11 -(35 10) routing lc_trk_g0_5 <X> input2_5 (35 10) routing lc_trk_g0_7 <X> input2_5 (35 10) routing lc_trk_g1_4 <X> input2_5 -(35 10) routing lc_trk_g1_6 <X> input2_5 -(35 10) routing lc_trk_g2_5 <X> input2_5 -(35 10) routing lc_trk_g2_7 <X> input2_5 (35 10) routing lc_trk_g3_4 <X> input2_5 (35 10) routing lc_trk_g3_6 <X> input2_5 (35 11) routing lc_trk_g0_3 <X> input2_5 (35 11) routing lc_trk_g0_7 <X> input2_5 -(35 11) routing lc_trk_g1_2 <X> input2_5 -(35 11) routing lc_trk_g1_6 <X> input2_5 (35 11) routing lc_trk_g2_3 <X> input2_5 -(35 11) routing lc_trk_g2_7 <X> input2_5 -(35 11) routing lc_trk_g3_2 <X> input2_5 (35 11) routing lc_trk_g3_6 <X> input2_5 (35 12) routing lc_trk_g0_4 <X> input2_6 (35 12) routing lc_trk_g0_6 <X> input2_6 @@ -3121,7 +2661,6 @@ (35 14) routing lc_trk_g1_4 <X> input2_7 (35 14) routing lc_trk_g1_6 <X> input2_7 (35 14) routing lc_trk_g2_5 <X> input2_7 -(35 14) routing lc_trk_g2_7 <X> input2_7 (35 14) routing lc_trk_g3_4 <X> input2_7 (35 14) routing lc_trk_g3_6 <X> input2_7 (35 15) routing lc_trk_g0_3 <X> input2_7 @@ -3129,25 +2668,15 @@ (35 15) routing lc_trk_g1_2 <X> input2_7 (35 15) routing lc_trk_g1_6 <X> input2_7 (35 15) routing lc_trk_g2_3 <X> input2_7 -(35 15) routing lc_trk_g2_7 <X> input2_7 (35 15) routing lc_trk_g3_2 <X> input2_7 (35 15) routing lc_trk_g3_6 <X> input2_7 (36 0) Enable bit of Mux _out_links/OutMux8_0 => wire_bram/ram/RDATA_15 sp4_h_r_32 -(36 1) Enable bit of Mux _out_links/OutMux6_0 => wire_bram/ram/RDATA_15 sp4_h_r_0 -(36 10) Enable bit of Mux _out_links/OutMux8_5 => wire_bram/ram/RDATA_10 sp4_h_r_42 -(36 11) Enable bit of Mux _out_links/OutMux6_5 => wire_bram/ram/RDATA_10 sp4_h_r_10 (36 12) Enable bit of Mux _out_links/OutMux8_6 => wire_bram/ram/RDATA_9 sp4_h_r_44 (36 13) Enable bit of Mux _out_links/OutMux6_6 => wire_bram/ram/RDATA_9 sp4_h_l_1 (36 14) Enable bit of Mux _out_links/OutMux8_7 => wire_bram/ram/RDATA_8 sp4_h_r_46 -(36 15) Enable bit of Mux _out_links/OutMux6_7 => wire_bram/ram/RDATA_8 sp4_h_l_3 (36 2) Enable bit of Mux _out_links/OutMux8_1 => wire_bram/ram/RDATA_14 sp4_h_r_34 -(36 3) Enable bit of Mux _out_links/OutMux6_1 => wire_bram/ram/RDATA_14 sp4_h_r_2 (36 4) Enable bit of Mux _out_links/OutMux8_2 => wire_bram/ram/RDATA_13 sp4_h_r_36 (36 5) Enable bit of Mux _out_links/OutMux6_2 => wire_bram/ram/RDATA_13 sp4_h_r_4 -(36 6) Enable bit of Mux _out_links/OutMux8_3 => wire_bram/ram/RDATA_12 sp4_h_l_27 -(36 7) Enable bit of Mux _out_links/OutMux6_3 => wire_bram/ram/RDATA_12 sp4_h_r_6 -(36 8) Enable bit of Mux _out_links/OutMux8_4 => wire_bram/ram/RDATA_11 sp4_h_r_40 -(36 9) Enable bit of Mux _out_links/OutMux6_4 => wire_bram/ram/RDATA_11 sp4_h_r_8 (37 0) Enable bit of Mux _out_links/OutMux5_0 => wire_bram/ram/RDATA_15 sp12_h_r_8 (37 1) Enable bit of Mux _out_links/OutMux7_0 => wire_bram/ram/RDATA_15 sp4_h_r_16 (37 10) Enable bit of Mux _out_links/OutMux4_5 => wire_bram/ram/RDATA_10 sp12_h_l_1 @@ -3166,20 +2695,15 @@ (37 9) Enable bit of Mux _out_links/OutMux7_4 => wire_bram/ram/RDATA_11 sp4_h_r_24 (38 0) Enable bit of Mux _out_links/OutMux2_0 => wire_bram/ram/RDATA_15 sp4_v_b_32 (38 1) Enable bit of Mux _out_links/OutMux0_0 => wire_bram/ram/RDATA_15 sp4_v_b_0 -(38 10) Enable bit of Mux _out_links/OutMux1_5 => wire_bram/ram/RDATA_10 sp4_v_t_15 (38 11) Enable bit of Mux _out_links/OutMux5_5 => wire_bram/ram/RDATA_10 sp12_h_l_17 (38 12) Enable bit of Mux _out_links/OutMux1_6 => wire_bram/ram/RDATA_9 sp4_v_b_28 (38 13) Enable bit of Mux _out_links/OutMux5_6 => wire_bram/ram/RDATA_9 sp12_h_r_20 -(38 14) Enable bit of Mux _out_links/OutMux1_7 => wire_bram/ram/RDATA_8 sp4_v_t_19 (38 15) Enable bit of Mux _out_links/OutMux5_7 => wire_bram/ram/RDATA_8 sp12_h_r_22 (38 2) Enable bit of Mux _out_links/OutMux2_1 => wire_bram/ram/RDATA_14 sp4_v_b_34 (38 3) Enable bit of Mux _out_links/OutMux0_1 => wire_bram/ram/RDATA_14 sp4_v_b_2 (38 4) Enable bit of Mux _out_links/OutMux2_2 => wire_bram/ram/RDATA_13 sp4_v_t_25 (38 5) Enable bit of Mux _out_links/OutMux0_2 => wire_bram/ram/RDATA_13 sp4_v_b_4 (38 6) Enable bit of Mux _out_links/OutMux2_3 => wire_bram/ram/RDATA_12 sp4_v_t_27 -(38 7) Enable bit of Mux _out_links/OutMux0_3 => wire_bram/ram/RDATA_12 sp4_v_b_6 -(38 8) Enable bit of Mux _out_links/OutMux1_4 => wire_bram/ram/RDATA_11 sp4_v_t_13 -(38 9) Enable bit of Mux _out_links/OutMux5_4 => wire_bram/ram/RDATA_11 sp12_h_l_15 (39 0) Enable bit of Mux _out_links/OutMux3_0 => wire_bram/ram/RDATA_15 sp12_v_b_0 (39 1) Enable bit of Mux _out_links/OutMux1_0 => wire_bram/ram/RDATA_15 sp4_v_b_16 (39 10) Enable bit of Mux _out_links/OutMux2_5 => wire_bram/ram/RDATA_10 sp4_v_t_31 @@ -3261,12 +2785,8 @@ (4 9) routing sp4_v_b_0 <X> sp4_h_r_6 (4 9) routing sp4_v_t_36 <X> sp4_h_r_6 (40 0) Enable bit of Mux _out_links/OutMuxa_0 => wire_bram/ram/RDATA_15 sp4_r_v_b_17 -(40 1) Enable bit of Mux _out_links/OutMux4_0 => wire_bram/ram/RDATA_15 sp12_v_b_16 -(40 10) Enable bit of Mux _out_links/OutMuxa_5 => wire_bram/ram/RDATA_10 sp4_r_v_b_27 (40 11) Enable bit of Mux _out_links/OutMux3_5 => wire_bram/ram/RDATA_10 sp12_v_b_10 -(40 12) Enable bit of Mux _out_links/OutMuxa_6 => wire_bram/ram/RDATA_9 sp4_r_v_b_29 (40 13) Enable bit of Mux _out_links/OutMux3_6 => wire_bram/ram/RDATA_9 sp12_v_t_11 -(40 14) Enable bit of Mux _out_links/OutMuxa_7 => wire_bram/ram/RDATA_8 sp4_r_v_b_31 (40 15) Enable bit of Mux _out_links/OutMux3_7 => wire_bram/ram/RDATA_8 sp12_v_b_14 (40 2) Enable bit of Mux _out_links/OutMuxa_1 => wire_bram/ram/RDATA_14 sp4_r_v_b_19 (40 3) Enable bit of Mux _out_links/OutMux4_1 => wire_bram/ram/RDATA_14 sp12_v_b_18 @@ -3285,7 +2805,6 @@ (41 14) Enable bit of Mux _out_links/OutMuxb_7 => wire_bram/ram/RDATA_8 sp4_r_v_b_47 (41 15) Enable bit of Mux _out_links/OutMux9_7 => wire_bram/ram/RDATA_8 sp4_r_v_b_15 (41 2) Enable bit of Mux _out_links/OutMuxb_1 => wire_bram/ram/RDATA_14 sp4_r_v_b_35 -(41 3) Enable bit of Mux _out_links/OutMux9_1 => wire_bram/ram/RDATA_14 sp4_r_v_b_3 (41 4) Enable bit of Mux _out_links/OutMuxb_2 => wire_bram/ram/RDATA_13 sp4_r_v_b_37 (41 5) Enable bit of Mux _out_links/OutMux9_2 => wire_bram/ram/RDATA_13 sp4_r_v_b_5 (41 6) Enable bit of Mux _out_links/OutMuxb_3 => wire_bram/ram/RDATA_12 sp4_r_v_b_39 @@ -3428,7 +2947,6 @@ (7 14) Column buffer control bit: MEMB_colbuf_cntl_7 (7 15) Column buffer control bit: MEMB_colbuf_cntl_6 (7 8) Column buffer control bit: MEMB_colbuf_cntl_1 -(7 9) Column buffer control bit: MEMB_colbuf_cntl_0 (8 0) routing sp4_h_l_36 <X> sp4_h_r_1 (8 0) routing sp4_h_l_40 <X> sp4_h_r_1 (8 0) routing sp4_v_b_1 <X> sp4_h_r_1 |