diff options
| author | David Shah <davey1576@gmail.com> | 2017-11-08 18:57:09 +0000 |
|---|---|---|
| committer | David Shah <davey1576@gmail.com> | 2017-11-17 15:07:52 +0000 |
| commit | 96b527bfeffb703baaa4119e48aae83ba0aa37cf (patch) | |
| tree | 11c5f70329cc5d099efba24d6fd2f32e8099b794 /icefuzz/cached_ramt_5k.txt | |
| parent | 629621642f4dd2d857edc914384b78161c438327 (diff) | |
| download | icestorm-96b527bfeffb703baaa4119e48aae83ba0aa37cf.tar.gz icestorm-96b527bfeffb703baaa4119e48aae83ba0aa37cf.tar.bz2 icestorm-96b527bfeffb703baaa4119e48aae83ba0aa37cf.zip | |
Create icefuzz scripts for DSP and 5k
Diffstat (limited to 'icefuzz/cached_ramt_5k.txt')
| -rw-r--r-- | icefuzz/cached_ramt_5k.txt | 459 |
1 files changed, 3 insertions, 456 deletions
diff --git a/icefuzz/cached_ramt_5k.txt b/icefuzz/cached_ramt_5k.txt index 48708fe..768ae76 100644 --- a/icefuzz/cached_ramt_5k.txt +++ b/icefuzz/cached_ramt_5k.txt @@ -1,18 +1,9 @@ (0 0) Negative Clock bit (0 10) routing glb_netwk_3 <X> glb2local_2 (0 10) routing glb_netwk_6 <X> glb2local_2 -(0 10) routing glb_netwk_7 <X> glb2local_2 -(0 11) routing glb_netwk_1 <X> glb2local_2 (0 11) routing glb_netwk_3 <X> glb2local_2 (0 11) routing glb_netwk_5 <X> glb2local_2 -(0 11) routing glb_netwk_7 <X> glb2local_2 -(0 12) routing glb_netwk_3 <X> glb2local_3 -(0 12) routing glb_netwk_6 <X> glb2local_3 -(0 12) routing glb_netwk_7 <X> glb2local_3 -(0 13) routing glb_netwk_1 <X> glb2local_3 -(0 13) routing glb_netwk_3 <X> glb2local_3 (0 13) routing glb_netwk_5 <X> glb2local_3 -(0 13) routing glb_netwk_7 <X> glb2local_3 (0 14) routing glb_netwk_4 <X> wire_bram/ram/WE (0 14) routing glb_netwk_6 <X> wire_bram/ram/WE (0 14) routing lc_trk_g2_4 <X> wire_bram/ram/WE @@ -21,55 +12,31 @@ (0 15) routing lc_trk_g1_5 <X> wire_bram/ram/WE (0 15) routing lc_trk_g3_5 <X> wire_bram/ram/WE (0 2) routing glb_netwk_2 <X> wire_bram/ram/WCLK -(0 2) routing glb_netwk_3 <X> wire_bram/ram/WCLK -(0 2) routing glb_netwk_6 <X> wire_bram/ram/WCLK (0 2) routing glb_netwk_7 <X> wire_bram/ram/WCLK (0 2) routing lc_trk_g2_0 <X> wire_bram/ram/WCLK (0 2) routing lc_trk_g3_1 <X> wire_bram/ram/WCLK (0 3) routing glb_netwk_1 <X> wire_bram/ram/WCLK -(0 3) routing glb_netwk_3 <X> wire_bram/ram/WCLK (0 3) routing glb_netwk_5 <X> wire_bram/ram/WCLK (0 3) routing glb_netwk_7 <X> wire_bram/ram/WCLK (0 3) routing lc_trk_g1_1 <X> wire_bram/ram/WCLK (0 3) routing lc_trk_g3_1 <X> wire_bram/ram/WCLK -(0 4) routing glb_netwk_5 <X> wire_bram/ram/WCLKE (0 4) routing lc_trk_g2_2 <X> wire_bram/ram/WCLKE (0 4) routing lc_trk_g3_3 <X> wire_bram/ram/WCLKE -(0 5) routing glb_netwk_3 <X> wire_bram/ram/WCLKE (0 5) routing lc_trk_g1_3 <X> wire_bram/ram/WCLKE (0 5) routing lc_trk_g3_3 <X> wire_bram/ram/WCLKE (0 6) routing glb_netwk_3 <X> glb2local_0 -(0 6) routing glb_netwk_6 <X> glb2local_0 -(0 6) routing glb_netwk_7 <X> glb2local_0 -(0 7) routing glb_netwk_1 <X> glb2local_0 (0 7) routing glb_netwk_3 <X> glb2local_0 (0 7) routing glb_netwk_5 <X> glb2local_0 -(0 7) routing glb_netwk_7 <X> glb2local_0 -(0 8) routing glb_netwk_3 <X> glb2local_1 (0 8) routing glb_netwk_6 <X> glb2local_1 -(0 9) routing glb_netwk_1 <X> glb2local_1 -(0 9) routing glb_netwk_3 <X> glb2local_1 -(0 9) routing glb_netwk_5 <X> glb2local_1 -(1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_1 glb2local_2 (1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_3 glb2local_2 (1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_4 glb2local_2 (1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_5 glb2local_2 (1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_6 glb2local_2 -(1 10) Enable bit of Mux _local_links/global_mux_2 => glb_netwk_7 glb2local_2 (1 11) routing glb_netwk_4 <X> glb2local_2 (1 11) routing glb_netwk_5 <X> glb2local_2 (1 11) routing glb_netwk_6 <X> glb2local_2 -(1 11) routing glb_netwk_7 <X> glb2local_2 -(1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_1 glb2local_3 -(1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_3 glb2local_3 -(1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_4 glb2local_3 (1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_5 glb2local_3 -(1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_6 glb2local_3 -(1 12) Enable bit of Mux _local_links/global_mux_3 => glb_netwk_7 glb2local_3 -(1 13) routing glb_netwk_4 <X> glb2local_3 (1 13) routing glb_netwk_5 <X> glb2local_3 -(1 13) routing glb_netwk_6 <X> glb2local_3 -(1 13) routing glb_netwk_7 <X> glb2local_3 (1 14) Enable bit of Mux _global_links/set_rst_mux => glb_netwk_4 wire_bram/ram/WE (1 14) Enable bit of Mux _global_links/set_rst_mux => glb_netwk_6 wire_bram/ram/WE (1 14) Enable bit of Mux _global_links/set_rst_mux => lc_trk_g0_4 wire_bram/ram/WE @@ -82,11 +49,8 @@ (1 15) routing lc_trk_g3_5 <X> wire_bram/ram/WE (1 2) routing glb_netwk_4 <X> wire_bram/ram/WCLK (1 2) routing glb_netwk_5 <X> wire_bram/ram/WCLK -(1 2) routing glb_netwk_6 <X> wire_bram/ram/WCLK (1 2) routing glb_netwk_7 <X> wire_bram/ram/WCLK (1 3) Enable bit of Mux _span_links/cross_mux_horz_5 => sp12_h_r_10 sp4_h_r_17 -(1 4) Enable bit of Mux _global_links/ce_mux => glb_netwk_3 wire_bram/ram/WCLKE -(1 4) Enable bit of Mux _global_links/ce_mux => glb_netwk_5 wire_bram/ram/WCLKE (1 4) Enable bit of Mux _global_links/ce_mux => lc_trk_g0_2 wire_bram/ram/WCLKE (1 4) Enable bit of Mux _global_links/ce_mux => lc_trk_g1_3 wire_bram/ram/WCLKE (1 4) Enable bit of Mux _global_links/ce_mux => lc_trk_g2_2 wire_bram/ram/WCLKE @@ -95,23 +59,10 @@ (1 5) routing lc_trk_g1_3 <X> wire_bram/ram/WCLKE (1 5) routing lc_trk_g2_2 <X> wire_bram/ram/WCLKE (1 5) routing lc_trk_g3_3 <X> wire_bram/ram/WCLKE -(1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_1 glb2local_0 (1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_3 glb2local_0 -(1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_4 glb2local_0 (1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_5 glb2local_0 -(1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_6 glb2local_0 -(1 6) Enable bit of Mux _local_links/global_mux_0 => glb_netwk_7 glb2local_0 -(1 7) routing glb_netwk_4 <X> glb2local_0 (1 7) routing glb_netwk_5 <X> glb2local_0 -(1 7) routing glb_netwk_6 <X> glb2local_0 -(1 7) routing glb_netwk_7 <X> glb2local_0 -(1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_1 glb2local_1 -(1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_3 glb2local_1 -(1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_4 glb2local_1 -(1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_5 glb2local_1 (1 8) Enable bit of Mux _local_links/global_mux_1 => glb_netwk_6 glb2local_1 -(1 9) routing glb_netwk_4 <X> glb2local_1 -(1 9) routing glb_netwk_5 <X> glb2local_1 (1 9) routing glb_netwk_6 <X> glb2local_1 (10 0) routing sp4_h_l_40 <X> sp4_h_r_1 (10 0) routing sp4_h_l_47 <X> sp4_h_r_1 @@ -181,6 +132,7 @@ (11 0) routing sp4_h_r_9 <X> sp4_v_b_2 (11 0) routing sp4_v_t_43 <X> sp4_v_b_2 (11 0) routing sp4_v_t_46 <X> sp4_v_b_2 +(11 1) routing sp4_h_l_39 <X> sp4_h_r_2 (11 1) routing sp4_h_l_43 <X> sp4_h_r_2 (11 1) routing sp4_v_b_2 <X> sp4_h_r_2 (11 1) routing sp4_v_b_8 <X> sp4_h_r_2 @@ -221,6 +173,7 @@ (11 4) routing sp4_v_t_39 <X> sp4_v_b_5 (11 4) routing sp4_v_t_44 <X> sp4_v_b_5 (11 5) routing sp4_h_l_40 <X> sp4_h_r_5 +(11 5) routing sp4_h_l_44 <X> sp4_h_r_5 (11 5) routing sp4_v_b_11 <X> sp4_h_r_5 (11 5) routing sp4_v_b_5 <X> sp4_h_r_5 (11 6) routing sp4_h_l_37 <X> sp4_v_t_40 @@ -348,6 +301,7 @@ (13 4) routing sp4_v_t_40 <X> sp4_v_b_5 (13 4) routing sp4_v_t_44 <X> sp4_v_b_5 (13 5) routing sp4_h_l_39 <X> sp4_h_r_5 +(13 5) routing sp4_h_l_44 <X> sp4_h_r_5 (13 5) routing sp4_v_b_11 <X> sp4_h_r_5 (13 5) routing sp4_v_t_37 <X> sp4_h_r_5 (13 6) routing sp4_h_r_11 <X> sp4_v_t_40 @@ -368,20 +322,16 @@ (13 9) routing sp4_v_t_38 <X> sp4_h_r_8 (14 0) routing bnr_op_0 <X> lc_trk_g0_0 (14 0) routing lft_op_0 <X> lc_trk_g0_0 -(14 0) routing sp12_h_r_0 <X> lc_trk_g0_0 (14 0) routing sp4_h_l_5 <X> lc_trk_g0_0 (14 0) routing sp4_h_r_8 <X> lc_trk_g0_0 (14 0) routing sp4_v_b_0 <X> lc_trk_g0_0 (14 0) routing sp4_v_b_8 <X> lc_trk_g0_0 (14 1) routing bnr_op_0 <X> lc_trk_g0_0 -(14 1) routing sp12_h_r_0 <X> lc_trk_g0_0 -(14 1) routing sp12_h_r_16 <X> lc_trk_g0_0 (14 1) routing sp4_h_l_5 <X> lc_trk_g0_0 (14 1) routing sp4_h_r_0 <X> lc_trk_g0_0 (14 1) routing sp4_r_v_b_35 <X> lc_trk_g0_0 (14 1) routing sp4_v_b_8 <X> lc_trk_g0_0 (14 10) routing bnl_op_4 <X> lc_trk_g2_4 -(14 10) routing rgt_op_4 <X> lc_trk_g2_4 (14 10) routing sp12_v_t_3 <X> lc_trk_g2_4 (14 10) routing sp4_h_r_36 <X> lc_trk_g2_4 (14 10) routing sp4_h_r_44 <X> lc_trk_g2_4 @@ -397,31 +347,21 @@ (14 11) routing tnl_op_4 <X> lc_trk_g2_4 (14 12) routing bnl_op_0 <X> lc_trk_g3_0 (14 12) routing rgt_op_0 <X> lc_trk_g3_0 -(14 12) routing sp12_v_b_0 <X> lc_trk_g3_0 -(14 12) routing sp4_h_l_21 <X> lc_trk_g3_0 (14 12) routing sp4_h_l_29 <X> lc_trk_g3_0 (14 12) routing sp4_v_t_13 <X> lc_trk_g3_0 (14 12) routing sp4_v_t_21 <X> lc_trk_g3_0 (14 13) routing bnl_op_0 <X> lc_trk_g3_0 -(14 13) routing sp12_v_b_0 <X> lc_trk_g3_0 (14 13) routing sp12_v_b_16 <X> lc_trk_g3_0 -(14 13) routing sp4_h_l_13 <X> lc_trk_g3_0 (14 13) routing sp4_h_l_29 <X> lc_trk_g3_0 (14 13) routing sp4_r_v_b_40 <X> lc_trk_g3_0 (14 13) routing sp4_v_t_21 <X> lc_trk_g3_0 (14 13) routing tnl_op_0 <X> lc_trk_g3_0 (14 14) routing bnl_op_4 <X> lc_trk_g3_4 (14 14) routing rgt_op_4 <X> lc_trk_g3_4 -(14 14) routing sp12_v_t_3 <X> lc_trk_g3_4 -(14 14) routing sp4_h_r_36 <X> lc_trk_g3_4 -(14 14) routing sp4_h_r_44 <X> lc_trk_g3_4 (14 14) routing sp4_v_b_28 <X> lc_trk_g3_4 (14 14) routing sp4_v_t_25 <X> lc_trk_g3_4 (14 15) routing bnl_op_4 <X> lc_trk_g3_4 -(14 15) routing sp12_v_t_19 <X> lc_trk_g3_4 -(14 15) routing sp12_v_t_3 <X> lc_trk_g3_4 (14 15) routing sp4_h_l_17 <X> lc_trk_g3_4 -(14 15) routing sp4_h_r_44 <X> lc_trk_g3_4 (14 15) routing sp4_r_v_b_44 <X> lc_trk_g3_4 (14 15) routing sp4_v_t_25 <X> lc_trk_g3_4 (14 15) routing tnl_op_4 <X> lc_trk_g3_4 @@ -434,14 +374,11 @@ (14 2) routing sp4_v_t_1 <X> lc_trk_g0_4 (14 3) routing bnr_op_4 <X> lc_trk_g0_4 (14 3) routing sp12_h_l_3 <X> lc_trk_g0_4 -(14 3) routing sp12_h_r_20 <X> lc_trk_g0_4 (14 3) routing sp4_h_r_20 <X> lc_trk_g0_4 (14 3) routing sp4_h_r_4 <X> lc_trk_g0_4 (14 3) routing sp4_r_v_b_28 <X> lc_trk_g0_4 (14 3) routing sp4_v_t_1 <X> lc_trk_g0_4 -(14 3) routing top_op_4 <X> lc_trk_g0_4 (14 4) routing bnr_op_0 <X> lc_trk_g1_0 -(14 4) routing lft_op_0 <X> lc_trk_g1_0 (14 4) routing sp12_h_r_0 <X> lc_trk_g1_0 (14 4) routing sp4_h_l_5 <X> lc_trk_g1_0 (14 4) routing sp4_h_r_8 <X> lc_trk_g1_0 @@ -449,7 +386,6 @@ (14 4) routing sp4_v_b_8 <X> lc_trk_g1_0 (14 5) routing bnr_op_0 <X> lc_trk_g1_0 (14 5) routing sp12_h_r_0 <X> lc_trk_g1_0 -(14 5) routing sp12_h_r_16 <X> lc_trk_g1_0 (14 5) routing sp4_h_l_5 <X> lc_trk_g1_0 (14 5) routing sp4_h_r_0 <X> lc_trk_g1_0 (14 5) routing sp4_r_v_b_24 <X> lc_trk_g1_0 @@ -463,34 +399,28 @@ (14 6) routing sp4_v_t_1 <X> lc_trk_g1_4 (14 7) routing bnr_op_4 <X> lc_trk_g1_4 (14 7) routing sp12_h_l_3 <X> lc_trk_g1_4 -(14 7) routing sp12_h_r_20 <X> lc_trk_g1_4 (14 7) routing sp4_h_r_20 <X> lc_trk_g1_4 (14 7) routing sp4_h_r_4 <X> lc_trk_g1_4 (14 7) routing sp4_r_v_b_28 <X> lc_trk_g1_4 (14 7) routing sp4_v_t_1 <X> lc_trk_g1_4 (14 8) routing bnl_op_0 <X> lc_trk_g2_0 (14 8) routing rgt_op_0 <X> lc_trk_g2_0 -(14 8) routing sp12_v_b_0 <X> lc_trk_g2_0 (14 8) routing sp4_h_l_21 <X> lc_trk_g2_0 (14 8) routing sp4_h_l_29 <X> lc_trk_g2_0 (14 8) routing sp4_v_t_13 <X> lc_trk_g2_0 (14 8) routing sp4_v_t_21 <X> lc_trk_g2_0 (14 9) routing bnl_op_0 <X> lc_trk_g2_0 -(14 9) routing sp12_v_b_0 <X> lc_trk_g2_0 (14 9) routing sp12_v_b_16 <X> lc_trk_g2_0 (14 9) routing sp4_h_l_13 <X> lc_trk_g2_0 (14 9) routing sp4_h_l_29 <X> lc_trk_g2_0 (14 9) routing sp4_r_v_b_32 <X> lc_trk_g2_0 (14 9) routing sp4_v_t_21 <X> lc_trk_g2_0 -(14 9) routing tnl_op_0 <X> lc_trk_g2_0 (15 0) routing lft_op_1 <X> lc_trk_g0_1 (15 0) routing sp12_h_r_1 <X> lc_trk_g0_1 -(15 0) routing sp4_h_r_1 <X> lc_trk_g0_1 (15 0) routing sp4_h_r_17 <X> lc_trk_g0_1 (15 0) routing sp4_h_r_9 <X> lc_trk_g0_1 (15 0) routing sp4_v_b_17 <X> lc_trk_g0_1 (15 1) routing lft_op_0 <X> lc_trk_g0_0 -(15 1) routing sp12_h_r_0 <X> lc_trk_g0_0 (15 1) routing sp4_h_l_5 <X> lc_trk_g0_0 (15 1) routing sp4_h_r_0 <X> lc_trk_g0_0 (15 1) routing sp4_h_r_8 <X> lc_trk_g0_0 @@ -498,12 +428,10 @@ (15 10) routing rgt_op_5 <X> lc_trk_g2_5 (15 10) routing sp12_v_b_5 <X> lc_trk_g2_5 (15 10) routing sp4_h_l_16 <X> lc_trk_g2_5 -(15 10) routing sp4_h_r_37 <X> lc_trk_g2_5 (15 10) routing sp4_h_r_45 <X> lc_trk_g2_5 (15 10) routing sp4_v_b_45 <X> lc_trk_g2_5 (15 10) routing tnl_op_5 <X> lc_trk_g2_5 (15 10) routing tnr_op_5 <X> lc_trk_g2_5 -(15 11) routing rgt_op_4 <X> lc_trk_g2_4 (15 11) routing sp12_v_t_3 <X> lc_trk_g2_4 (15 11) routing sp4_h_l_17 <X> lc_trk_g2_4 (15 11) routing sp4_h_r_36 <X> lc_trk_g2_4 @@ -511,18 +439,13 @@ (15 11) routing sp4_v_t_33 <X> lc_trk_g2_4 (15 11) routing tnl_op_4 <X> lc_trk_g2_4 (15 11) routing tnr_op_4 <X> lc_trk_g2_4 -(15 12) routing rgt_op_1 <X> lc_trk_g3_1 (15 12) routing sp12_v_b_1 <X> lc_trk_g3_1 -(15 12) routing sp4_h_l_20 <X> lc_trk_g3_1 (15 12) routing sp4_h_l_28 <X> lc_trk_g3_1 (15 12) routing sp4_h_r_25 <X> lc_trk_g3_1 (15 12) routing sp4_v_b_41 <X> lc_trk_g3_1 (15 12) routing tnl_op_1 <X> lc_trk_g3_1 (15 12) routing tnr_op_1 <X> lc_trk_g3_1 (15 13) routing rgt_op_0 <X> lc_trk_g3_0 -(15 13) routing sp12_v_b_0 <X> lc_trk_g3_0 -(15 13) routing sp4_h_l_13 <X> lc_trk_g3_0 -(15 13) routing sp4_h_l_21 <X> lc_trk_g3_0 (15 13) routing sp4_h_l_29 <X> lc_trk_g3_0 (15 13) routing sp4_v_b_40 <X> lc_trk_g3_0 (15 13) routing tnl_op_0 <X> lc_trk_g3_0 @@ -531,15 +454,11 @@ (15 14) routing sp12_v_b_5 <X> lc_trk_g3_5 (15 14) routing sp4_h_l_16 <X> lc_trk_g3_5 (15 14) routing sp4_h_r_37 <X> lc_trk_g3_5 -(15 14) routing sp4_h_r_45 <X> lc_trk_g3_5 (15 14) routing sp4_v_b_45 <X> lc_trk_g3_5 (15 14) routing tnl_op_5 <X> lc_trk_g3_5 (15 14) routing tnr_op_5 <X> lc_trk_g3_5 (15 15) routing rgt_op_4 <X> lc_trk_g3_4 -(15 15) routing sp12_v_t_3 <X> lc_trk_g3_4 (15 15) routing sp4_h_l_17 <X> lc_trk_g3_4 -(15 15) routing sp4_h_r_36 <X> lc_trk_g3_4 -(15 15) routing sp4_h_r_44 <X> lc_trk_g3_4 (15 15) routing sp4_v_t_33 <X> lc_trk_g3_4 (15 15) routing tnl_op_4 <X> lc_trk_g3_4 (15 15) routing tnr_op_4 <X> lc_trk_g3_4 @@ -555,14 +474,12 @@ (15 3) routing sp4_h_r_20 <X> lc_trk_g0_4 (15 3) routing sp4_h_r_4 <X> lc_trk_g0_4 (15 3) routing sp4_v_b_20 <X> lc_trk_g0_4 -(15 3) routing top_op_4 <X> lc_trk_g0_4 (15 4) routing lft_op_1 <X> lc_trk_g1_1 (15 4) routing sp12_h_r_1 <X> lc_trk_g1_1 (15 4) routing sp4_h_r_1 <X> lc_trk_g1_1 (15 4) routing sp4_h_r_17 <X> lc_trk_g1_1 (15 4) routing sp4_h_r_9 <X> lc_trk_g1_1 (15 4) routing sp4_v_b_17 <X> lc_trk_g1_1 -(15 5) routing lft_op_0 <X> lc_trk_g1_0 (15 5) routing sp12_h_r_0 <X> lc_trk_g1_0 (15 5) routing sp4_h_l_5 <X> lc_trk_g1_0 (15 5) routing sp4_h_r_0 <X> lc_trk_g1_0 @@ -580,7 +497,6 @@ (15 7) routing sp4_h_r_20 <X> lc_trk_g1_4 (15 7) routing sp4_h_r_4 <X> lc_trk_g1_4 (15 7) routing sp4_v_b_20 <X> lc_trk_g1_4 -(15 8) routing rgt_op_1 <X> lc_trk_g2_1 (15 8) routing sp12_v_b_1 <X> lc_trk_g2_1 (15 8) routing sp4_h_l_20 <X> lc_trk_g2_1 (15 8) routing sp4_h_l_28 <X> lc_trk_g2_1 @@ -589,22 +505,17 @@ (15 8) routing tnl_op_1 <X> lc_trk_g2_1 (15 8) routing tnr_op_1 <X> lc_trk_g2_1 (15 9) routing rgt_op_0 <X> lc_trk_g2_0 -(15 9) routing sp12_v_b_0 <X> lc_trk_g2_0 (15 9) routing sp4_h_l_13 <X> lc_trk_g2_0 (15 9) routing sp4_h_l_21 <X> lc_trk_g2_0 (15 9) routing sp4_h_l_29 <X> lc_trk_g2_0 (15 9) routing sp4_v_b_40 <X> lc_trk_g2_0 -(15 9) routing tnl_op_0 <X> lc_trk_g2_0 (15 9) routing tnr_op_0 <X> lc_trk_g2_0 (16 0) routing sp12_h_l_6 <X> lc_trk_g0_1 -(16 0) routing sp12_h_r_17 <X> lc_trk_g0_1 -(16 0) routing sp4_h_r_1 <X> lc_trk_g0_1 (16 0) routing sp4_h_r_17 <X> lc_trk_g0_1 (16 0) routing sp4_h_r_9 <X> lc_trk_g0_1 (16 0) routing sp4_v_b_1 <X> lc_trk_g0_1 (16 0) routing sp4_v_b_17 <X> lc_trk_g0_1 (16 0) routing sp4_v_b_9 <X> lc_trk_g0_1 -(16 1) routing sp12_h_r_16 <X> lc_trk_g0_0 (16 1) routing sp12_h_r_8 <X> lc_trk_g0_0 (16 1) routing sp4_h_l_5 <X> lc_trk_g0_0 (16 1) routing sp4_h_r_0 <X> lc_trk_g0_0 @@ -615,7 +526,6 @@ (16 10) routing sp12_v_b_21 <X> lc_trk_g2_5 (16 10) routing sp12_v_t_10 <X> lc_trk_g2_5 (16 10) routing sp4_h_l_16 <X> lc_trk_g2_5 -(16 10) routing sp4_h_r_37 <X> lc_trk_g2_5 (16 10) routing sp4_h_r_45 <X> lc_trk_g2_5 (16 10) routing sp4_v_b_29 <X> lc_trk_g2_5 (16 10) routing sp4_v_b_37 <X> lc_trk_g2_5 @@ -630,7 +540,6 @@ (16 11) routing sp4_v_t_33 <X> lc_trk_g2_4 (16 12) routing sp12_v_b_17 <X> lc_trk_g3_1 (16 12) routing sp12_v_b_9 <X> lc_trk_g3_1 -(16 12) routing sp4_h_l_20 <X> lc_trk_g3_1 (16 12) routing sp4_h_l_28 <X> lc_trk_g3_1 (16 12) routing sp4_h_r_25 <X> lc_trk_g3_1 (16 12) routing sp4_v_b_25 <X> lc_trk_g3_1 @@ -638,8 +547,6 @@ (16 12) routing sp4_v_b_41 <X> lc_trk_g3_1 (16 13) routing sp12_v_b_16 <X> lc_trk_g3_0 (16 13) routing sp12_v_t_7 <X> lc_trk_g3_0 -(16 13) routing sp4_h_l_13 <X> lc_trk_g3_0 -(16 13) routing sp4_h_l_21 <X> lc_trk_g3_0 (16 13) routing sp4_h_l_29 <X> lc_trk_g3_0 (16 13) routing sp4_v_b_40 <X> lc_trk_g3_0 (16 13) routing sp4_v_t_13 <X> lc_trk_g3_0 @@ -648,19 +555,13 @@ (16 14) routing sp12_v_t_10 <X> lc_trk_g3_5 (16 14) routing sp4_h_l_16 <X> lc_trk_g3_5 (16 14) routing sp4_h_r_37 <X> lc_trk_g3_5 -(16 14) routing sp4_h_r_45 <X> lc_trk_g3_5 (16 14) routing sp4_v_b_29 <X> lc_trk_g3_5 (16 14) routing sp4_v_b_37 <X> lc_trk_g3_5 (16 14) routing sp4_v_b_45 <X> lc_trk_g3_5 -(16 15) routing sp12_v_b_12 <X> lc_trk_g3_4 -(16 15) routing sp12_v_t_19 <X> lc_trk_g3_4 (16 15) routing sp4_h_l_17 <X> lc_trk_g3_4 -(16 15) routing sp4_h_r_36 <X> lc_trk_g3_4 -(16 15) routing sp4_h_r_44 <X> lc_trk_g3_4 (16 15) routing sp4_v_b_28 <X> lc_trk_g3_4 (16 15) routing sp4_v_t_25 <X> lc_trk_g3_4 (16 15) routing sp4_v_t_33 <X> lc_trk_g3_4 -(16 2) routing sp12_h_l_18 <X> lc_trk_g0_5 (16 2) routing sp12_h_r_13 <X> lc_trk_g0_5 (16 2) routing sp4_h_l_8 <X> lc_trk_g0_5 (16 2) routing sp4_h_r_13 <X> lc_trk_g0_5 @@ -668,8 +569,6 @@ (16 2) routing sp4_v_b_13 <X> lc_trk_g0_5 (16 2) routing sp4_v_b_5 <X> lc_trk_g0_5 (16 2) routing sp4_v_t_8 <X> lc_trk_g0_5 -(16 3) routing sp12_h_r_12 <X> lc_trk_g0_4 -(16 3) routing sp12_h_r_20 <X> lc_trk_g0_4 (16 3) routing sp4_h_r_12 <X> lc_trk_g0_4 (16 3) routing sp4_h_r_20 <X> lc_trk_g0_4 (16 3) routing sp4_h_r_4 <X> lc_trk_g0_4 @@ -684,7 +583,6 @@ (16 4) routing sp4_v_b_1 <X> lc_trk_g1_1 (16 4) routing sp4_v_b_17 <X> lc_trk_g1_1 (16 4) routing sp4_v_b_9 <X> lc_trk_g1_1 -(16 5) routing sp12_h_r_16 <X> lc_trk_g1_0 (16 5) routing sp12_h_r_8 <X> lc_trk_g1_0 (16 5) routing sp4_h_l_5 <X> lc_trk_g1_0 (16 5) routing sp4_h_r_0 <X> lc_trk_g1_0 @@ -692,16 +590,12 @@ (16 5) routing sp4_v_b_0 <X> lc_trk_g1_0 (16 5) routing sp4_v_b_16 <X> lc_trk_g1_0 (16 5) routing sp4_v_b_8 <X> lc_trk_g1_0 -(16 6) routing sp12_h_l_18 <X> lc_trk_g1_5 -(16 6) routing sp12_h_r_13 <X> lc_trk_g1_5 (16 6) routing sp4_h_l_8 <X> lc_trk_g1_5 (16 6) routing sp4_h_r_13 <X> lc_trk_g1_5 (16 6) routing sp4_h_r_5 <X> lc_trk_g1_5 (16 6) routing sp4_v_b_13 <X> lc_trk_g1_5 (16 6) routing sp4_v_b_5 <X> lc_trk_g1_5 (16 6) routing sp4_v_t_8 <X> lc_trk_g1_5 -(16 7) routing sp12_h_r_12 <X> lc_trk_g1_4 -(16 7) routing sp12_h_r_20 <X> lc_trk_g1_4 (16 7) routing sp4_h_r_12 <X> lc_trk_g1_4 (16 7) routing sp4_h_r_20 <X> lc_trk_g1_4 (16 7) routing sp4_h_r_4 <X> lc_trk_g1_4 @@ -728,8 +622,6 @@ (17 0) Enable bit of Mux _local_links/g0_mux_1 => lft_op_1 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp12_h_l_6 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp12_h_r_1 lc_trk_g0_1 -(17 0) Enable bit of Mux _local_links/g0_mux_1 => sp12_h_r_17 lc_trk_g0_1 -(17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_h_r_1 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_h_r_17 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_h_r_9 lc_trk_g0_1 (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_r_v_b_25 lc_trk_g0_1 @@ -739,8 +631,6 @@ (17 0) Enable bit of Mux _local_links/g0_mux_1 => sp4_v_b_9 lc_trk_g0_1 (17 1) Enable bit of Mux _local_links/g0_mux_0 => bnr_op_0 lc_trk_g0_0 (17 1) Enable bit of Mux _local_links/g0_mux_0 => lft_op_0 lc_trk_g0_0 -(17 1) Enable bit of Mux _local_links/g0_mux_0 => sp12_h_r_0 lc_trk_g0_0 -(17 1) Enable bit of Mux _local_links/g0_mux_0 => sp12_h_r_16 lc_trk_g0_0 (17 1) Enable bit of Mux _local_links/g0_mux_0 => sp12_h_r_8 lc_trk_g0_0 (17 1) Enable bit of Mux _local_links/g0_mux_0 => sp4_h_l_5 lc_trk_g0_0 (17 1) Enable bit of Mux _local_links/g0_mux_0 => sp4_h_r_0 lc_trk_g0_0 @@ -756,7 +646,6 @@ (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp12_v_b_5 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp12_v_t_10 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_h_l_16 lc_trk_g2_5 -(17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_h_r_37 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_h_r_45 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_r_v_b_13 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => sp4_r_v_b_37 lc_trk_g2_5 @@ -766,7 +655,6 @@ (17 10) Enable bit of Mux _local_links/g2_mux_5 => tnl_op_5 lc_trk_g2_5 (17 10) Enable bit of Mux _local_links/g2_mux_5 => tnr_op_5 lc_trk_g2_5 (17 11) Enable bit of Mux _local_links/g2_mux_4 => bnl_op_4 lc_trk_g2_4 -(17 11) Enable bit of Mux _local_links/g2_mux_4 => rgt_op_4 lc_trk_g2_4 (17 11) Enable bit of Mux _local_links/g2_mux_4 => sp12_v_b_12 lc_trk_g2_4 (17 11) Enable bit of Mux _local_links/g2_mux_4 => sp12_v_t_19 lc_trk_g2_4 (17 11) Enable bit of Mux _local_links/g2_mux_4 => sp12_v_t_3 lc_trk_g2_4 @@ -781,11 +669,9 @@ (17 11) Enable bit of Mux _local_links/g2_mux_4 => tnl_op_4 lc_trk_g2_4 (17 11) Enable bit of Mux _local_links/g2_mux_4 => tnr_op_4 lc_trk_g2_4 (17 12) Enable bit of Mux _local_links/g3_mux_1 => bnl_op_1 lc_trk_g3_1 -(17 12) Enable bit of Mux _local_links/g3_mux_1 => rgt_op_1 lc_trk_g3_1 (17 12) Enable bit of Mux _local_links/g3_mux_1 => sp12_v_b_1 lc_trk_g3_1 (17 12) Enable bit of Mux _local_links/g3_mux_1 => sp12_v_b_17 lc_trk_g3_1 (17 12) Enable bit of Mux _local_links/g3_mux_1 => sp12_v_b_9 lc_trk_g3_1 -(17 12) Enable bit of Mux _local_links/g3_mux_1 => sp4_h_l_20 lc_trk_g3_1 (17 12) Enable bit of Mux _local_links/g3_mux_1 => sp4_h_l_28 lc_trk_g3_1 (17 12) Enable bit of Mux _local_links/g3_mux_1 => sp4_h_r_25 lc_trk_g3_1 (17 12) Enable bit of Mux _local_links/g3_mux_1 => sp4_r_v_b_17 lc_trk_g3_1 @@ -797,11 +683,8 @@ (17 12) Enable bit of Mux _local_links/g3_mux_1 => tnr_op_1 lc_trk_g3_1 (17 13) Enable bit of Mux _local_links/g3_mux_0 => bnl_op_0 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => rgt_op_0 lc_trk_g3_0 -(17 13) Enable bit of Mux _local_links/g3_mux_0 => sp12_v_b_0 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => sp12_v_b_16 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => sp12_v_t_7 lc_trk_g3_0 -(17 13) Enable bit of Mux _local_links/g3_mux_0 => sp4_h_l_13 lc_trk_g3_0 -(17 13) Enable bit of Mux _local_links/g3_mux_0 => sp4_h_l_21 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => sp4_h_l_29 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => sp4_r_v_b_16 lc_trk_g3_0 (17 13) Enable bit of Mux _local_links/g3_mux_0 => sp4_r_v_b_40 lc_trk_g3_0 @@ -817,7 +700,6 @@ (17 14) Enable bit of Mux _local_links/g3_mux_5 => sp12_v_t_10 lc_trk_g3_5 (17 14) Enable bit of Mux _local_links/g3_mux_5 => sp4_h_l_16 lc_trk_g3_5 (17 14) Enable bit of Mux _local_links/g3_mux_5 => sp4_h_r_37 lc_trk_g3_5 -(17 14) Enable bit of Mux _local_links/g3_mux_5 => sp4_h_r_45 lc_trk_g3_5 (17 14) Enable bit of Mux _local_links/g3_mux_5 => sp4_r_v_b_21 lc_trk_g3_5 (17 14) Enable bit of Mux _local_links/g3_mux_5 => sp4_r_v_b_45 lc_trk_g3_5 (17 14) Enable bit of Mux _local_links/g3_mux_5 => sp4_v_b_29 lc_trk_g3_5 @@ -827,12 +709,7 @@ (17 14) Enable bit of Mux _local_links/g3_mux_5 => tnr_op_5 lc_trk_g3_5 (17 15) Enable bit of Mux _local_links/g3_mux_4 => bnl_op_4 lc_trk_g3_4 (17 15) Enable bit of Mux _local_links/g3_mux_4 => rgt_op_4 lc_trk_g3_4 -(17 15) Enable bit of Mux _local_links/g3_mux_4 => sp12_v_b_12 lc_trk_g3_4 -(17 15) Enable bit of Mux _local_links/g3_mux_4 => sp12_v_t_19 lc_trk_g3_4 -(17 15) Enable bit of Mux _local_links/g3_mux_4 => sp12_v_t_3 lc_trk_g3_4 (17 15) Enable bit of Mux _local_links/g3_mux_4 => sp4_h_l_17 lc_trk_g3_4 -(17 15) Enable bit of Mux _local_links/g3_mux_4 => sp4_h_r_36 lc_trk_g3_4 -(17 15) Enable bit of Mux _local_links/g3_mux_4 => sp4_h_r_44 lc_trk_g3_4 (17 15) Enable bit of Mux _local_links/g3_mux_4 => sp4_r_v_b_20 lc_trk_g3_4 (17 15) Enable bit of Mux _local_links/g3_mux_4 => sp4_r_v_b_44 lc_trk_g3_4 (17 15) Enable bit of Mux _local_links/g3_mux_4 => sp4_v_b_28 lc_trk_g3_4 @@ -843,7 +720,6 @@ (17 2) Enable bit of Mux _local_links/g0_mux_5 => bnr_op_5 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => glb2local_1 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => lft_op_5 lc_trk_g0_5 -(17 2) Enable bit of Mux _local_links/g0_mux_5 => sp12_h_l_18 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => sp12_h_r_13 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => sp12_h_r_5 lc_trk_g0_5 (17 2) Enable bit of Mux _local_links/g0_mux_5 => sp4_h_l_8 lc_trk_g0_5 @@ -857,8 +733,6 @@ (17 3) Enable bit of Mux _local_links/g0_mux_4 => glb2local_0 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => lft_op_4 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => sp12_h_l_3 lc_trk_g0_4 -(17 3) Enable bit of Mux _local_links/g0_mux_4 => sp12_h_r_12 lc_trk_g0_4 -(17 3) Enable bit of Mux _local_links/g0_mux_4 => sp12_h_r_20 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => sp4_h_r_12 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => sp4_h_r_20 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => sp4_h_r_4 lc_trk_g0_4 @@ -866,7 +740,6 @@ (17 3) Enable bit of Mux _local_links/g0_mux_4 => sp4_v_b_20 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => sp4_v_b_4 lc_trk_g0_4 (17 3) Enable bit of Mux _local_links/g0_mux_4 => sp4_v_t_1 lc_trk_g0_4 -(17 3) Enable bit of Mux _local_links/g0_mux_4 => top_op_4 lc_trk_g0_4 (17 4) Enable bit of Mux _local_links/g1_mux_1 => bnr_op_1 lc_trk_g1_1 (17 4) Enable bit of Mux _local_links/g1_mux_1 => lft_op_1 lc_trk_g1_1 (17 4) Enable bit of Mux _local_links/g1_mux_1 => sp12_h_l_6 lc_trk_g1_1 @@ -881,9 +754,7 @@ (17 4) Enable bit of Mux _local_links/g1_mux_1 => sp4_v_b_17 lc_trk_g1_1 (17 4) Enable bit of Mux _local_links/g1_mux_1 => sp4_v_b_9 lc_trk_g1_1 (17 5) Enable bit of Mux _local_links/g1_mux_0 => bnr_op_0 lc_trk_g1_0 -(17 5) Enable bit of Mux _local_links/g1_mux_0 => lft_op_0 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp12_h_r_0 lc_trk_g1_0 -(17 5) Enable bit of Mux _local_links/g1_mux_0 => sp12_h_r_16 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp12_h_r_8 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_h_l_5 lc_trk_g1_0 (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_h_r_0 lc_trk_g1_0 @@ -895,8 +766,6 @@ (17 5) Enable bit of Mux _local_links/g1_mux_0 => sp4_v_b_8 lc_trk_g1_0 (17 6) Enable bit of Mux _local_links/g1_mux_5 => bnr_op_5 lc_trk_g1_5 (17 6) Enable bit of Mux _local_links/g1_mux_5 => lft_op_5 lc_trk_g1_5 -(17 6) Enable bit of Mux _local_links/g1_mux_5 => sp12_h_l_18 lc_trk_g1_5 -(17 6) Enable bit of Mux _local_links/g1_mux_5 => sp12_h_r_13 lc_trk_g1_5 (17 6) Enable bit of Mux _local_links/g1_mux_5 => sp12_h_r_5 lc_trk_g1_5 (17 6) Enable bit of Mux _local_links/g1_mux_5 => sp4_h_l_8 lc_trk_g1_5 (17 6) Enable bit of Mux _local_links/g1_mux_5 => sp4_h_r_13 lc_trk_g1_5 @@ -909,8 +778,6 @@ (17 7) Enable bit of Mux _local_links/g1_mux_4 => bnr_op_4 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => lft_op_4 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp12_h_l_3 lc_trk_g1_4 -(17 7) Enable bit of Mux _local_links/g1_mux_4 => sp12_h_r_12 lc_trk_g1_4 -(17 7) Enable bit of Mux _local_links/g1_mux_4 => sp12_h_r_20 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_h_r_12 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_h_r_20 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_h_r_4 lc_trk_g1_4 @@ -920,7 +787,6 @@ (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_v_b_4 lc_trk_g1_4 (17 7) Enable bit of Mux _local_links/g1_mux_4 => sp4_v_t_1 lc_trk_g1_4 (17 8) Enable bit of Mux _local_links/g2_mux_1 => bnl_op_1 lc_trk_g2_1 -(17 8) Enable bit of Mux _local_links/g2_mux_1 => rgt_op_1 lc_trk_g2_1 (17 8) Enable bit of Mux _local_links/g2_mux_1 => sp12_v_b_1 lc_trk_g2_1 (17 8) Enable bit of Mux _local_links/g2_mux_1 => sp12_v_b_17 lc_trk_g2_1 (17 8) Enable bit of Mux _local_links/g2_mux_1 => sp12_v_b_9 lc_trk_g2_1 @@ -936,7 +802,6 @@ (17 8) Enable bit of Mux _local_links/g2_mux_1 => tnr_op_1 lc_trk_g2_1 (17 9) Enable bit of Mux _local_links/g2_mux_0 => bnl_op_0 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => rgt_op_0 lc_trk_g2_0 -(17 9) Enable bit of Mux _local_links/g2_mux_0 => sp12_v_b_0 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp12_v_b_16 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp12_v_t_7 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_h_l_13 lc_trk_g2_0 @@ -947,7 +812,6 @@ (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_v_b_40 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_v_t_13 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => sp4_v_t_21 lc_trk_g2_0 -(17 9) Enable bit of Mux _local_links/g2_mux_0 => tnl_op_0 lc_trk_g2_0 (17 9) Enable bit of Mux _local_links/g2_mux_0 => tnr_op_0 lc_trk_g2_0 (18 0) routing bnr_op_1 <X> lc_trk_g0_1 (18 0) routing lft_op_1 <X> lc_trk_g0_1 @@ -958,15 +822,12 @@ (18 0) routing sp4_v_b_9 <X> lc_trk_g0_1 (18 1) routing bnr_op_1 <X> lc_trk_g0_1 (18 1) routing sp12_h_r_1 <X> lc_trk_g0_1 -(18 1) routing sp12_h_r_17 <X> lc_trk_g0_1 -(18 1) routing sp4_h_r_1 <X> lc_trk_g0_1 (18 1) routing sp4_h_r_17 <X> lc_trk_g0_1 (18 1) routing sp4_r_v_b_34 <X> lc_trk_g0_1 (18 1) routing sp4_v_b_9 <X> lc_trk_g0_1 (18 10) routing bnl_op_5 <X> lc_trk_g2_5 (18 10) routing rgt_op_5 <X> lc_trk_g2_5 (18 10) routing sp12_v_b_5 <X> lc_trk_g2_5 -(18 10) routing sp4_h_r_37 <X> lc_trk_g2_5 (18 10) routing sp4_h_r_45 <X> lc_trk_g2_5 (18 10) routing sp4_v_b_29 <X> lc_trk_g2_5 (18 10) routing sp4_v_b_37 <X> lc_trk_g2_5 @@ -979,9 +840,7 @@ (18 11) routing sp4_v_b_37 <X> lc_trk_g2_5 (18 11) routing tnl_op_5 <X> lc_trk_g2_5 (18 12) routing bnl_op_1 <X> lc_trk_g3_1 -(18 12) routing rgt_op_1 <X> lc_trk_g3_1 (18 12) routing sp12_v_b_1 <X> lc_trk_g3_1 -(18 12) routing sp4_h_l_20 <X> lc_trk_g3_1 (18 12) routing sp4_h_l_28 <X> lc_trk_g3_1 (18 12) routing sp4_v_b_25 <X> lc_trk_g3_1 (18 12) routing sp4_v_b_33 <X> lc_trk_g3_1 @@ -997,14 +856,12 @@ (18 14) routing rgt_op_5 <X> lc_trk_g3_5 (18 14) routing sp12_v_b_5 <X> lc_trk_g3_5 (18 14) routing sp4_h_r_37 <X> lc_trk_g3_5 -(18 14) routing sp4_h_r_45 <X> lc_trk_g3_5 (18 14) routing sp4_v_b_29 <X> lc_trk_g3_5 (18 14) routing sp4_v_b_37 <X> lc_trk_g3_5 (18 15) routing bnl_op_5 <X> lc_trk_g3_5 (18 15) routing sp12_v_b_21 <X> lc_trk_g3_5 (18 15) routing sp12_v_b_5 <X> lc_trk_g3_5 (18 15) routing sp4_h_l_16 <X> lc_trk_g3_5 -(18 15) routing sp4_h_r_45 <X> lc_trk_g3_5 (18 15) routing sp4_r_v_b_45 <X> lc_trk_g3_5 (18 15) routing sp4_v_b_37 <X> lc_trk_g3_5 (18 15) routing tnl_op_5 <X> lc_trk_g3_5 @@ -1016,7 +873,6 @@ (18 2) routing sp4_v_b_13 <X> lc_trk_g0_5 (18 2) routing sp4_v_b_5 <X> lc_trk_g0_5 (18 3) routing bnr_op_5 <X> lc_trk_g0_5 -(18 3) routing sp12_h_l_18 <X> lc_trk_g0_5 (18 3) routing sp12_h_r_5 <X> lc_trk_g0_5 (18 3) routing sp4_h_l_8 <X> lc_trk_g0_5 (18 3) routing sp4_h_r_5 <X> lc_trk_g0_5 @@ -1044,14 +900,12 @@ (18 6) routing sp4_v_b_13 <X> lc_trk_g1_5 (18 6) routing sp4_v_b_5 <X> lc_trk_g1_5 (18 7) routing bnr_op_5 <X> lc_trk_g1_5 -(18 7) routing sp12_h_l_18 <X> lc_trk_g1_5 (18 7) routing sp12_h_r_5 <X> lc_trk_g1_5 (18 7) routing sp4_h_l_8 <X> lc_trk_g1_5 (18 7) routing sp4_h_r_5 <X> lc_trk_g1_5 (18 7) routing sp4_r_v_b_29 <X> lc_trk_g1_5 (18 7) routing sp4_v_b_13 <X> lc_trk_g1_5 (18 8) routing bnl_op_1 <X> lc_trk_g2_1 -(18 8) routing rgt_op_1 <X> lc_trk_g2_1 (18 8) routing sp12_v_b_1 <X> lc_trk_g2_1 (18 8) routing sp4_h_l_20 <X> lc_trk_g2_1 (18 8) routing sp4_h_l_28 <X> lc_trk_g2_1 @@ -1085,13 +939,10 @@ (2 10) Enable bit of Mux _span_links/cross_mux_horz_9 => sp12_h_r_18 sp4_h_l_8 (2 12) Enable bit of Mux _span_links/cross_mux_horz_10 => sp12_h_r_20 sp4_h_r_22 (2 14) Enable bit of Mux _span_links/cross_mux_horz_11 => sp12_h_l_21 sp4_h_l_10 -(2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_0 wire_bram/ram/WCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_1 wire_bram/ram/WCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_2 wire_bram/ram/WCLK -(2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_3 wire_bram/ram/WCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_4 wire_bram/ram/WCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_5 wire_bram/ram/WCLK -(2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_6 wire_bram/ram/WCLK (2 2) Enable bit of Mux _global_links/clk_mux => glb_netwk_7 wire_bram/ram/WCLK (2 2) Enable bit of Mux _global_links/clk_mux => lc_trk_g0_0 wire_bram/ram/WCLK (2 2) Enable bit of Mux _global_links/clk_mux => lc_trk_g1_1 wire_bram/ram/WCLK @@ -1105,7 +956,6 @@ (2 6) Enable bit of Mux _span_links/cross_mux_horz_7 => sp12_h_l_13 sp4_h_r_19 (2 8) Enable bit of Mux _span_links/cross_mux_horz_8 => sp12_h_r_16 sp4_h_r_20 (21 0) routing bnr_op_3 <X> lc_trk_g0_3 -(21 0) routing lft_op_3 <X> lc_trk_g0_3 (21 0) routing sp12_h_l_0 <X> lc_trk_g0_3 (21 0) routing sp4_h_r_11 <X> lc_trk_g0_3 (21 0) routing sp4_h_r_19 <X> lc_trk_g0_3 @@ -1113,15 +963,11 @@ (21 0) routing sp4_v_b_3 <X> lc_trk_g0_3 (21 1) routing bnr_op_3 <X> lc_trk_g0_3 (21 1) routing sp12_h_l_0 <X> lc_trk_g0_3 -(21 1) routing sp12_h_l_16 <X> lc_trk_g0_3 (21 1) routing sp4_h_r_19 <X> lc_trk_g0_3 -(21 1) routing sp4_h_r_3 <X> lc_trk_g0_3 (21 1) routing sp4_r_v_b_32 <X> lc_trk_g0_3 (21 1) routing sp4_v_b_11 <X> lc_trk_g0_3 (21 10) routing bnl_op_7 <X> lc_trk_g2_7 -(21 10) routing rgt_op_7 <X> lc_trk_g2_7 (21 10) routing sp12_v_b_7 <X> lc_trk_g2_7 -(21 10) routing sp4_h_l_26 <X> lc_trk_g2_7 (21 10) routing sp4_h_r_47 <X> lc_trk_g2_7 (21 10) routing sp4_v_t_18 <X> lc_trk_g2_7 (21 10) routing sp4_v_t_26 <X> lc_trk_g2_7 @@ -1132,7 +978,6 @@ (21 11) routing sp4_h_r_47 <X> lc_trk_g2_7 (21 11) routing sp4_r_v_b_39 <X> lc_trk_g2_7 (21 11) routing sp4_v_t_26 <X> lc_trk_g2_7 -(21 11) routing tnl_op_7 <X> lc_trk_g2_7 (21 12) routing bnl_op_3 <X> lc_trk_g3_3 (21 12) routing rgt_op_3 <X> lc_trk_g3_3 (21 12) routing sp12_v_t_0 <X> lc_trk_g3_3 @@ -1151,28 +996,21 @@ (21 14) routing bnl_op_7 <X> lc_trk_g3_7 (21 14) routing rgt_op_7 <X> lc_trk_g3_7 (21 14) routing sp12_v_b_7 <X> lc_trk_g3_7 -(21 14) routing sp4_h_l_26 <X> lc_trk_g3_7 -(21 14) routing sp4_h_r_47 <X> lc_trk_g3_7 (21 14) routing sp4_v_t_18 <X> lc_trk_g3_7 (21 14) routing sp4_v_t_26 <X> lc_trk_g3_7 (21 15) routing bnl_op_7 <X> lc_trk_g3_7 (21 15) routing sp12_v_b_23 <X> lc_trk_g3_7 (21 15) routing sp12_v_b_7 <X> lc_trk_g3_7 (21 15) routing sp4_h_l_18 <X> lc_trk_g3_7 -(21 15) routing sp4_h_r_47 <X> lc_trk_g3_7 (21 15) routing sp4_r_v_b_47 <X> lc_trk_g3_7 (21 15) routing sp4_v_t_26 <X> lc_trk_g3_7 -(21 15) routing tnl_op_7 <X> lc_trk_g3_7 (21 2) routing bnr_op_7 <X> lc_trk_g0_7 (21 2) routing lft_op_7 <X> lc_trk_g0_7 -(21 2) routing sp12_h_l_4 <X> lc_trk_g0_7 (21 2) routing sp4_h_l_10 <X> lc_trk_g0_7 (21 2) routing sp4_h_l_2 <X> lc_trk_g0_7 (21 2) routing sp4_v_b_7 <X> lc_trk_g0_7 (21 2) routing sp4_v_t_2 <X> lc_trk_g0_7 (21 3) routing bnr_op_7 <X> lc_trk_g0_7 -(21 3) routing sp12_h_l_4 <X> lc_trk_g0_7 -(21 3) routing sp12_h_r_23 <X> lc_trk_g0_7 (21 3) routing sp4_h_l_10 <X> lc_trk_g0_7 (21 3) routing sp4_h_r_7 <X> lc_trk_g0_7 (21 3) routing sp4_r_v_b_31 <X> lc_trk_g0_7 @@ -1186,27 +1024,22 @@ (21 4) routing sp4_v_b_3 <X> lc_trk_g1_3 (21 5) routing bnr_op_3 <X> lc_trk_g1_3 (21 5) routing sp12_h_l_0 <X> lc_trk_g1_3 -(21 5) routing sp12_h_l_16 <X> lc_trk_g1_3 (21 5) routing sp4_h_r_19 <X> lc_trk_g1_3 (21 5) routing sp4_h_r_3 <X> lc_trk_g1_3 (21 5) routing sp4_r_v_b_27 <X> lc_trk_g1_3 (21 5) routing sp4_v_b_11 <X> lc_trk_g1_3 (21 6) routing bnr_op_7 <X> lc_trk_g1_7 (21 6) routing lft_op_7 <X> lc_trk_g1_7 -(21 6) routing sp12_h_l_4 <X> lc_trk_g1_7 (21 6) routing sp4_h_l_10 <X> lc_trk_g1_7 (21 6) routing sp4_h_l_2 <X> lc_trk_g1_7 (21 6) routing sp4_v_b_7 <X> lc_trk_g1_7 (21 6) routing sp4_v_t_2 <X> lc_trk_g1_7 (21 7) routing bnr_op_7 <X> lc_trk_g1_7 -(21 7) routing sp12_h_l_4 <X> lc_trk_g1_7 -(21 7) routing sp12_h_r_23 <X> lc_trk_g1_7 (21 7) routing sp4_h_l_10 <X> lc_trk_g1_7 (21 7) routing sp4_h_r_7 <X> lc_trk_g1_7 (21 7) routing sp4_r_v_b_31 <X> lc_trk_g1_7 (21 7) routing sp4_v_t_2 <X> lc_trk_g1_7 (21 8) routing bnl_op_3 <X> lc_trk_g2_3 -(21 8) routing rgt_op_3 <X> lc_trk_g2_3 (21 8) routing sp12_v_t_0 <X> lc_trk_g2_3 (21 8) routing sp4_h_l_30 <X> lc_trk_g2_3 (21 8) routing sp4_h_r_35 <X> lc_trk_g2_3 @@ -1216,18 +1049,13 @@ (21 9) routing sp12_v_t_0 <X> lc_trk_g2_3 (21 9) routing sp12_v_t_16 <X> lc_trk_g2_3 (21 9) routing sp4_h_l_30 <X> lc_trk_g2_3 -(21 9) routing sp4_h_r_27 <X> lc_trk_g2_3 (21 9) routing sp4_r_v_b_35 <X> lc_trk_g2_3 (21 9) routing sp4_v_t_22 <X> lc_trk_g2_3 (21 9) routing tnl_op_3 <X> lc_trk_g2_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => bnr_op_3 lc_trk_g0_3 -(22 0) Enable bit of Mux _local_links/g0_mux_3 => lft_op_3 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp12_h_l_0 lc_trk_g0_3 -(22 0) Enable bit of Mux _local_links/g0_mux_3 => sp12_h_l_16 lc_trk_g0_3 -(22 0) Enable bit of Mux _local_links/g0_mux_3 => sp12_h_r_11 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_h_r_11 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_h_r_19 lc_trk_g0_3 -(22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_h_r_3 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_r_v_b_27 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_r_v_b_32 lc_trk_g0_3 (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_v_b_11 lc_trk_g0_3 @@ -1235,8 +1063,6 @@ (22 0) Enable bit of Mux _local_links/g0_mux_3 => sp4_v_b_3 lc_trk_g0_3 (22 1) Enable bit of Mux _local_links/g0_mux_2 => bnr_op_2 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => lft_op_2 lc_trk_g0_2 -(22 1) Enable bit of Mux _local_links/g0_mux_2 => sp12_h_r_10 lc_trk_g0_2 -(22 1) Enable bit of Mux _local_links/g0_mux_2 => sp12_h_r_18 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp12_h_r_2 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp4_h_l_7 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp4_h_r_10 lc_trk_g0_2 @@ -1246,21 +1072,17 @@ (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp4_v_b_10 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp4_v_b_2 lc_trk_g0_2 (22 1) Enable bit of Mux _local_links/g0_mux_2 => sp4_v_t_7 lc_trk_g0_2 -(22 1) Enable bit of Mux _local_links/g0_mux_2 => top_op_2 lc_trk_g0_2 (22 10) Enable bit of Mux _local_links/g2_mux_7 => bnl_op_7 lc_trk_g2_7 -(22 10) Enable bit of Mux _local_links/g2_mux_7 => rgt_op_7 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp12_v_b_23 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp12_v_b_7 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp12_v_t_12 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_h_l_18 lc_trk_g2_7 -(22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_h_l_26 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_h_r_47 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_r_v_b_15 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_r_v_b_39 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_v_b_47 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_v_t_18 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => sp4_v_t_26 lc_trk_g2_7 -(22 10) Enable bit of Mux _local_links/g2_mux_7 => tnl_op_7 lc_trk_g2_7 (22 10) Enable bit of Mux _local_links/g2_mux_7 => tnr_op_7 lc_trk_g2_7 (22 11) Enable bit of Mux _local_links/g2_mux_6 => bnl_op_6 lc_trk_g2_6 (22 11) Enable bit of Mux _local_links/g2_mux_6 => rgt_op_6 lc_trk_g2_6 @@ -1313,14 +1135,11 @@ (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp12_v_b_7 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp12_v_t_12 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_h_l_18 lc_trk_g3_7 -(22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_h_l_26 lc_trk_g3_7 -(22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_h_r_47 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_r_v_b_23 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_r_v_b_47 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_v_b_47 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_v_t_18 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => sp4_v_t_26 lc_trk_g3_7 -(22 14) Enable bit of Mux _local_links/g3_mux_7 => tnl_op_7 lc_trk_g3_7 (22 14) Enable bit of Mux _local_links/g3_mux_7 => tnr_op_7 lc_trk_g3_7 (22 15) Enable bit of Mux _local_links/g3_mux_6 => bnl_op_6 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => rgt_op_6 lc_trk_g3_6 @@ -1328,7 +1147,6 @@ (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp12_v_b_6 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp12_v_t_21 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_h_l_27 lc_trk_g3_6 -(22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_h_r_30 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_h_r_46 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_r_v_b_22 lc_trk_g3_6 (22 15) Enable bit of Mux _local_links/g3_mux_6 => sp4_r_v_b_46 lc_trk_g3_6 @@ -1340,9 +1158,6 @@ (22 2) Enable bit of Mux _local_links/g0_mux_7 => bnr_op_7 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => glb2local_3 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => lft_op_7 lc_trk_g0_7 -(22 2) Enable bit of Mux _local_links/g0_mux_7 => sp12_h_l_12 lc_trk_g0_7 -(22 2) Enable bit of Mux _local_links/g0_mux_7 => sp12_h_l_4 lc_trk_g0_7 -(22 2) Enable bit of Mux _local_links/g0_mux_7 => sp12_h_r_23 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp4_h_l_10 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp4_h_l_2 lc_trk_g0_7 (22 2) Enable bit of Mux _local_links/g0_mux_7 => sp4_h_r_7 lc_trk_g0_7 @@ -1353,9 +1168,7 @@ (22 3) Enable bit of Mux _local_links/g0_mux_6 => bnr_op_6 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => glb2local_2 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => lft_op_6 lc_trk_g0_6 -(22 3) Enable bit of Mux _local_links/g0_mux_6 => sp12_h_l_13 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp12_h_l_21 lc_trk_g0_6 -(22 3) Enable bit of Mux _local_links/g0_mux_6 => sp12_h_l_5 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_h_l_3 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_h_r_22 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_h_r_6 lc_trk_g0_6 @@ -1363,12 +1176,9 @@ (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_v_b_14 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_v_b_22 lc_trk_g0_6 (22 3) Enable bit of Mux _local_links/g0_mux_6 => sp4_v_b_6 lc_trk_g0_6 -(22 3) Enable bit of Mux _local_links/g0_mux_6 => top_op_6 lc_trk_g0_6 (22 4) Enable bit of Mux _local_links/g1_mux_3 => bnr_op_3 lc_trk_g1_3 (22 4) Enable bit of Mux _local_links/g1_mux_3 => lft_op_3 lc_trk_g1_3 (22 4) Enable bit of Mux _local_links/g1_mux_3 => sp12_h_l_0 lc_trk_g1_3 -(22 4) Enable bit of Mux _local_links/g1_mux_3 => sp12_h_l_16 lc_trk_g1_3 -(22 4) Enable bit of Mux _local_links/g1_mux_3 => sp12_h_r_11 lc_trk_g1_3 (22 4) Enable bit of Mux _local_links/g1_mux_3 => sp4_h_r_11 lc_trk_g1_3 (22 4) Enable bit of Mux _local_links/g1_mux_3 => sp4_h_r_19 lc_trk_g1_3 (22 4) Enable bit of Mux _local_links/g1_mux_3 => sp4_h_r_3 lc_trk_g1_3 @@ -1380,22 +1190,16 @@ (22 5) Enable bit of Mux _local_links/g1_mux_2 => bnr_op_2 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => lft_op_2 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp12_h_r_10 lc_trk_g1_2 -(22 5) Enable bit of Mux _local_links/g1_mux_2 => sp12_h_r_18 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp12_h_r_2 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_h_l_7 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_h_r_10 lc_trk_g1_2 -(22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_h_r_2 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_r_v_b_2 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_r_v_b_26 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_v_b_10 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_v_b_2 lc_trk_g1_2 (22 5) Enable bit of Mux _local_links/g1_mux_2 => sp4_v_t_7 lc_trk_g1_2 -(22 5) Enable bit of Mux _local_links/g1_mux_2 => top_op_2 lc_trk_g1_2 (22 6) Enable bit of Mux _local_links/g1_mux_7 => bnr_op_7 lc_trk_g1_7 (22 6) Enable bit of Mux _local_links/g1_mux_7 => lft_op_7 lc_trk_g1_7 -(22 6) Enable bit of Mux _local_links/g1_mux_7 => sp12_h_l_12 lc_trk_g1_7 -(22 6) Enable bit of Mux _local_links/g1_mux_7 => sp12_h_l_4 lc_trk_g1_7 -(22 6) Enable bit of Mux _local_links/g1_mux_7 => sp12_h_r_23 lc_trk_g1_7 (22 6) Enable bit of Mux _local_links/g1_mux_7 => sp4_h_l_10 lc_trk_g1_7 (22 6) Enable bit of Mux _local_links/g1_mux_7 => sp4_h_l_2 lc_trk_g1_7 (22 6) Enable bit of Mux _local_links/g1_mux_7 => sp4_h_r_7 lc_trk_g1_7 @@ -1406,25 +1210,19 @@ (22 6) Enable bit of Mux _local_links/g1_mux_7 => sp4_v_t_2 lc_trk_g1_7 (22 7) Enable bit of Mux _local_links/g1_mux_6 => bnr_op_6 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => lft_op_6 lc_trk_g1_6 -(22 7) Enable bit of Mux _local_links/g1_mux_6 => sp12_h_l_13 lc_trk_g1_6 -(22 7) Enable bit of Mux _local_links/g1_mux_6 => sp12_h_l_21 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp12_h_l_5 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_h_l_3 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_h_r_22 lc_trk_g1_6 -(22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_h_r_6 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_r_v_b_30 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_r_v_b_6 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_v_b_14 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_v_b_22 lc_trk_g1_6 (22 7) Enable bit of Mux _local_links/g1_mux_6 => sp4_v_b_6 lc_trk_g1_6 -(22 7) Enable bit of Mux _local_links/g1_mux_6 => top_op_6 lc_trk_g1_6 (22 8) Enable bit of Mux _local_links/g2_mux_3 => bnl_op_3 lc_trk_g2_3 -(22 8) Enable bit of Mux _local_links/g2_mux_3 => rgt_op_3 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp12_v_b_11 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp12_v_t_0 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp12_v_t_16 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_h_l_30 lc_trk_g2_3 -(22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_h_r_27 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_h_r_35 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_r_v_b_11 lc_trk_g2_3 (22 8) Enable bit of Mux _local_links/g2_mux_3 => sp4_r_v_b_35 lc_trk_g2_3 @@ -1446,18 +1244,12 @@ (22 9) Enable bit of Mux _local_links/g2_mux_2 => sp4_v_b_26 lc_trk_g2_2 (22 9) Enable bit of Mux _local_links/g2_mux_2 => sp4_v_t_23 lc_trk_g2_2 (22 9) Enable bit of Mux _local_links/g2_mux_2 => sp4_v_t_31 lc_trk_g2_2 -(22 9) Enable bit of Mux _local_links/g2_mux_2 => tnl_op_2 lc_trk_g2_2 (22 9) Enable bit of Mux _local_links/g2_mux_2 => tnr_op_2 lc_trk_g2_2 -(23 0) routing sp12_h_l_16 <X> lc_trk_g0_3 -(23 0) routing sp12_h_r_11 <X> lc_trk_g0_3 (23 0) routing sp4_h_r_11 <X> lc_trk_g0_3 (23 0) routing sp4_h_r_19 <X> lc_trk_g0_3 -(23 0) routing sp4_h_r_3 <X> lc_trk_g0_3 (23 0) routing sp4_v_b_11 <X> lc_trk_g0_3 (23 0) routing sp4_v_b_19 <X> lc_trk_g0_3 (23 0) routing sp4_v_b_3 <X> lc_trk_g0_3 -(23 1) routing sp12_h_r_10 <X> lc_trk_g0_2 -(23 1) routing sp12_h_r_18 <X> lc_trk_g0_2 (23 1) routing sp4_h_l_7 <X> lc_trk_g0_2 (23 1) routing sp4_h_r_10 <X> lc_trk_g0_2 (23 1) routing sp4_h_r_2 <X> lc_trk_g0_2 @@ -1467,7 +1259,6 @@ (23 10) routing sp12_v_b_23 <X> lc_trk_g2_7 (23 10) routing sp12_v_t_12 <X> lc_trk_g2_7 (23 10) routing sp4_h_l_18 <X> lc_trk_g2_7 -(23 10) routing sp4_h_l_26 <X> lc_trk_g2_7 (23 10) routing sp4_h_r_47 <X> lc_trk_g2_7 (23 10) routing sp4_v_b_47 <X> lc_trk_g2_7 (23 10) routing sp4_v_t_18 <X> lc_trk_g2_7 @@ -1499,28 +1290,22 @@ (23 14) routing sp12_v_b_23 <X> lc_trk_g3_7 (23 14) routing sp12_v_t_12 <X> lc_trk_g3_7 (23 14) routing sp4_h_l_18 <X> lc_trk_g3_7 -(23 14) routing sp4_h_l_26 <X> lc_trk_g3_7 -(23 14) routing sp4_h_r_47 <X> lc_trk_g3_7 (23 14) routing sp4_v_b_47 <X> lc_trk_g3_7 (23 14) routing sp4_v_t_18 <X> lc_trk_g3_7 (23 14) routing sp4_v_t_26 <X> lc_trk_g3_7 (23 15) routing sp12_v_b_14 <X> lc_trk_g3_6 (23 15) routing sp12_v_t_21 <X> lc_trk_g3_6 (23 15) routing sp4_h_l_27 <X> lc_trk_g3_6 -(23 15) routing sp4_h_r_30 <X> lc_trk_g3_6 (23 15) routing sp4_h_r_46 <X> lc_trk_g3_6 (23 15) routing sp4_v_b_30 <X> lc_trk_g3_6 (23 15) routing sp4_v_b_38 <X> lc_trk_g3_6 (23 15) routing sp4_v_b_46 <X> lc_trk_g3_6 -(23 2) routing sp12_h_l_12 <X> lc_trk_g0_7 -(23 2) routing sp12_h_r_23 <X> lc_trk_g0_7 (23 2) routing sp4_h_l_10 <X> lc_trk_g0_7 (23 2) routing sp4_h_l_2 <X> lc_trk_g0_7 (23 2) routing sp4_h_r_7 <X> lc_trk_g0_7 (23 2) routing sp4_v_b_7 <X> lc_trk_g0_7 (23 2) routing sp4_v_t_10 <X> lc_trk_g0_7 (23 2) routing sp4_v_t_2 <X> lc_trk_g0_7 -(23 3) routing sp12_h_l_13 <X> lc_trk_g0_6 (23 3) routing sp12_h_l_21 <X> lc_trk_g0_6 (23 3) routing sp4_h_l_3 <X> lc_trk_g0_6 (23 3) routing sp4_h_r_22 <X> lc_trk_g0_6 @@ -1528,8 +1313,6 @@ (23 3) routing sp4_v_b_14 <X> lc_trk_g0_6 (23 3) routing sp4_v_b_22 <X> lc_trk_g0_6 (23 3) routing sp4_v_b_6 <X> lc_trk_g0_6 -(23 4) routing sp12_h_l_16 <X> lc_trk_g1_3 -(23 4) routing sp12_h_r_11 <X> lc_trk_g1_3 (23 4) routing sp4_h_r_11 <X> lc_trk_g1_3 (23 4) routing sp4_h_r_19 <X> lc_trk_g1_3 (23 4) routing sp4_h_r_3 <X> lc_trk_g1_3 @@ -1537,33 +1320,25 @@ (23 4) routing sp4_v_b_19 <X> lc_trk_g1_3 (23 4) routing sp4_v_b_3 <X> lc_trk_g1_3 (23 5) routing sp12_h_r_10 <X> lc_trk_g1_2 -(23 5) routing sp12_h_r_18 <X> lc_trk_g1_2 (23 5) routing sp4_h_l_7 <X> lc_trk_g1_2 (23 5) routing sp4_h_r_10 <X> lc_trk_g1_2 -(23 5) routing sp4_h_r_2 <X> lc_trk_g1_2 (23 5) routing sp4_v_b_10 <X> lc_trk_g1_2 (23 5) routing sp4_v_b_2 <X> lc_trk_g1_2 (23 5) routing sp4_v_t_7 <X> lc_trk_g1_2 -(23 6) routing sp12_h_l_12 <X> lc_trk_g1_7 -(23 6) routing sp12_h_r_23 <X> lc_trk_g1_7 (23 6) routing sp4_h_l_10 <X> lc_trk_g1_7 (23 6) routing sp4_h_l_2 <X> lc_trk_g1_7 (23 6) routing sp4_h_r_7 <X> lc_trk_g1_7 (23 6) routing sp4_v_b_7 <X> lc_trk_g1_7 (23 6) routing sp4_v_t_10 <X> lc_trk_g1_7 (23 6) routing sp4_v_t_2 <X> lc_trk_g1_7 -(23 7) routing sp12_h_l_13 <X> lc_trk_g1_6 -(23 7) routing sp12_h_l_21 <X> lc_trk_g1_6 (23 7) routing sp4_h_l_3 <X> lc_trk_g1_6 (23 7) routing sp4_h_r_22 <X> lc_trk_g1_6 -(23 7) routing sp4_h_r_6 <X> lc_trk_g1_6 (23 7) routing sp4_v_b_14 <X> lc_trk_g1_6 (23 7) routing sp4_v_b_22 <X> lc_trk_g1_6 (23 7) routing sp4_v_b_6 <X> lc_trk_g1_6 (23 8) routing sp12_v_b_11 <X> lc_trk_g2_3 (23 8) routing sp12_v_t_16 <X> lc_trk_g2_3 (23 8) routing sp4_h_l_30 <X> lc_trk_g2_3 -(23 8) routing sp4_h_r_27 <X> lc_trk_g2_3 (23 8) routing sp4_h_r_35 <X> lc_trk_g2_3 (23 8) routing sp4_v_t_14 <X> lc_trk_g2_3 (23 8) routing sp4_v_t_22 <X> lc_trk_g2_3 @@ -1576,11 +1351,9 @@ (23 9) routing sp4_v_b_26 <X> lc_trk_g2_2 (23 9) routing sp4_v_t_23 <X> lc_trk_g2_2 (23 9) routing sp4_v_t_31 <X> lc_trk_g2_2 -(24 0) routing lft_op_3 <X> lc_trk_g0_3 (24 0) routing sp12_h_l_0 <X> lc_trk_g0_3 (24 0) routing sp4_h_r_11 <X> lc_trk_g0_3 (24 0) routing sp4_h_r_19 <X> lc_trk_g0_3 -(24 0) routing sp4_h_r_3 <X> lc_trk_g0_3 (24 0) routing sp4_v_b_19 <X> lc_trk_g0_3 (24 1) routing lft_op_2 <X> lc_trk_g0_2 (24 1) routing sp12_h_r_2 <X> lc_trk_g0_2 @@ -1588,14 +1361,10 @@ (24 1) routing sp4_h_r_10 <X> lc_trk_g0_2 (24 1) routing sp4_h_r_2 <X> lc_trk_g0_2 (24 1) routing sp4_v_t_7 <X> lc_trk_g0_2 -(24 1) routing top_op_2 <X> lc_trk_g0_2 -(24 10) routing rgt_op_7 <X> lc_trk_g2_7 (24 10) routing sp12_v_b_7 <X> lc_trk_g2_7 (24 10) routing sp4_h_l_18 <X> lc_trk_g2_7 -(24 10) routing sp4_h_l_26 <X> lc_trk_g2_7 (24 10) routing sp4_h_r_47 <X> lc_trk_g2_7 (24 10) routing sp4_v_b_47 <X> lc_trk_g2_7 -(24 10) routing tnl_op_7 <X> lc_trk_g2_7 (24 10) routing tnr_op_7 <X> lc_trk_g2_7 (24 11) routing rgt_op_6 <X> lc_trk_g2_6 (24 11) routing sp12_v_b_6 <X> lc_trk_g2_6 @@ -1624,32 +1393,25 @@ (24 14) routing rgt_op_7 <X> lc_trk_g3_7 (24 14) routing sp12_v_b_7 <X> lc_trk_g3_7 (24 14) routing sp4_h_l_18 <X> lc_trk_g3_7 -(24 14) routing sp4_h_l_26 <X> lc_trk_g3_7 -(24 14) routing sp4_h_r_47 <X> lc_trk_g3_7 (24 14) routing sp4_v_b_47 <X> lc_trk_g3_7 -(24 14) routing tnl_op_7 <X> lc_trk_g3_7 (24 14) routing tnr_op_7 <X> lc_trk_g3_7 (24 15) routing rgt_op_6 <X> lc_trk_g3_6 (24 15) routing sp12_v_b_6 <X> lc_trk_g3_6 (24 15) routing sp4_h_l_27 <X> lc_trk_g3_6 -(24 15) routing sp4_h_r_30 <X> lc_trk_g3_6 (24 15) routing sp4_h_r_46 <X> lc_trk_g3_6 (24 15) routing sp4_v_b_46 <X> lc_trk_g3_6 (24 15) routing tnl_op_6 <X> lc_trk_g3_6 (24 15) routing tnr_op_6 <X> lc_trk_g3_6 (24 2) routing lft_op_7 <X> lc_trk_g0_7 -(24 2) routing sp12_h_l_4 <X> lc_trk_g0_7 (24 2) routing sp4_h_l_10 <X> lc_trk_g0_7 (24 2) routing sp4_h_l_2 <X> lc_trk_g0_7 (24 2) routing sp4_h_r_7 <X> lc_trk_g0_7 (24 2) routing sp4_v_t_10 <X> lc_trk_g0_7 (24 3) routing lft_op_6 <X> lc_trk_g0_6 -(24 3) routing sp12_h_l_5 <X> lc_trk_g0_6 (24 3) routing sp4_h_l_3 <X> lc_trk_g0_6 (24 3) routing sp4_h_r_22 <X> lc_trk_g0_6 (24 3) routing sp4_h_r_6 <X> lc_trk_g0_6 (24 3) routing sp4_v_b_22 <X> lc_trk_g0_6 -(24 3) routing top_op_6 <X> lc_trk_g0_6 (24 4) routing lft_op_3 <X> lc_trk_g1_3 (24 4) routing sp12_h_l_0 <X> lc_trk_g1_3 (24 4) routing sp4_h_r_11 <X> lc_trk_g1_3 @@ -1660,11 +1422,8 @@ (24 5) routing sp12_h_r_2 <X> lc_trk_g1_2 (24 5) routing sp4_h_l_7 <X> lc_trk_g1_2 (24 5) routing sp4_h_r_10 <X> lc_trk_g1_2 -(24 5) routing sp4_h_r_2 <X> lc_trk_g1_2 (24 5) routing sp4_v_t_7 <X> lc_trk_g1_2 -(24 5) routing top_op_2 <X> lc_trk_g1_2 (24 6) routing lft_op_7 <X> lc_trk_g1_7 -(24 6) routing sp12_h_l_4 <X> lc_trk_g1_7 (24 6) routing sp4_h_l_10 <X> lc_trk_g1_7 (24 6) routing sp4_h_l_2 <X> lc_trk_g1_7 (24 6) routing sp4_h_r_7 <X> lc_trk_g1_7 @@ -1673,13 +1432,9 @@ (24 7) routing sp12_h_l_5 <X> lc_trk_g1_6 (24 7) routing sp4_h_l_3 <X> lc_trk_g1_6 (24 7) routing sp4_h_r_22 <X> lc_trk_g1_6 -(24 7) routing sp4_h_r_6 <X> lc_trk_g1_6 (24 7) routing sp4_v_b_22 <X> lc_trk_g1_6 -(24 7) routing top_op_6 <X> lc_trk_g1_6 -(24 8) routing rgt_op_3 <X> lc_trk_g2_3 (24 8) routing sp12_v_t_0 <X> lc_trk_g2_3 (24 8) routing sp4_h_l_30 <X> lc_trk_g2_3 -(24 8) routing sp4_h_r_27 <X> lc_trk_g2_3 (24 8) routing sp4_h_r_35 <X> lc_trk_g2_3 (24 8) routing sp4_v_t_30 <X> lc_trk_g2_3 (24 8) routing tnl_op_3 <X> lc_trk_g2_3 @@ -1690,7 +1445,6 @@ (24 9) routing sp4_h_r_34 <X> lc_trk_g2_2 (24 9) routing sp4_h_r_42 <X> lc_trk_g2_2 (24 9) routing sp4_v_t_31 <X> lc_trk_g2_2 -(24 9) routing tnl_op_2 <X> lc_trk_g2_2 (24 9) routing tnr_op_2 <X> lc_trk_g2_2 (25 0) routing bnr_op_2 <X> lc_trk_g0_2 (25 0) routing lft_op_2 <X> lc_trk_g0_2 @@ -1700,13 +1454,11 @@ (25 0) routing sp4_v_b_10 <X> lc_trk_g0_2 (25 0) routing sp4_v_b_2 <X> lc_trk_g0_2 (25 1) routing bnr_op_2 <X> lc_trk_g0_2 -(25 1) routing sp12_h_r_18 <X> lc_trk_g0_2 (25 1) routing sp12_h_r_2 <X> lc_trk_g0_2 (25 1) routing sp4_h_l_7 <X> lc_trk_g0_2 (25 1) routing sp4_h_r_2 <X> lc_trk_g0_2 (25 1) routing sp4_r_v_b_33 <X> lc_trk_g0_2 (25 1) routing sp4_v_b_10 <X> lc_trk_g0_2 -(25 1) routing top_op_2 <X> lc_trk_g0_2 (25 10) routing bnl_op_6 <X> lc_trk_g2_6 (25 10) routing rgt_op_6 <X> lc_trk_g2_6 (25 10) routing sp12_v_b_6 <X> lc_trk_g2_6 @@ -1747,26 +1499,22 @@ (25 15) routing bnl_op_6 <X> lc_trk_g3_6 (25 15) routing sp12_v_b_6 <X> lc_trk_g3_6 (25 15) routing sp12_v_t_21 <X> lc_trk_g3_6 -(25 15) routing sp4_h_r_30 <X> lc_trk_g3_6 (25 15) routing sp4_h_r_46 <X> lc_trk_g3_6 (25 15) routing sp4_r_v_b_46 <X> lc_trk_g3_6 (25 15) routing sp4_v_b_38 <X> lc_trk_g3_6 (25 15) routing tnl_op_6 <X> lc_trk_g3_6 (25 2) routing bnr_op_6 <X> lc_trk_g0_6 (25 2) routing lft_op_6 <X> lc_trk_g0_6 -(25 2) routing sp12_h_l_5 <X> lc_trk_g0_6 (25 2) routing sp4_h_l_3 <X> lc_trk_g0_6 (25 2) routing sp4_h_r_22 <X> lc_trk_g0_6 (25 2) routing sp4_v_b_14 <X> lc_trk_g0_6 (25 2) routing sp4_v_b_6 <X> lc_trk_g0_6 (25 3) routing bnr_op_6 <X> lc_trk_g0_6 (25 3) routing sp12_h_l_21 <X> lc_trk_g0_6 -(25 3) routing sp12_h_l_5 <X> lc_trk_g0_6 (25 3) routing sp4_h_r_22 <X> lc_trk_g0_6 (25 3) routing sp4_h_r_6 <X> lc_trk_g0_6 (25 3) routing sp4_r_v_b_30 <X> lc_trk_g0_6 (25 3) routing sp4_v_b_14 <X> lc_trk_g0_6 -(25 3) routing top_op_6 <X> lc_trk_g0_6 (25 4) routing bnr_op_2 <X> lc_trk_g1_2 (25 4) routing lft_op_2 <X> lc_trk_g1_2 (25 4) routing sp12_h_r_2 <X> lc_trk_g1_2 @@ -1775,13 +1523,10 @@ (25 4) routing sp4_v_b_10 <X> lc_trk_g1_2 (25 4) routing sp4_v_b_2 <X> lc_trk_g1_2 (25 5) routing bnr_op_2 <X> lc_trk_g1_2 -(25 5) routing sp12_h_r_18 <X> lc_trk_g1_2 (25 5) routing sp12_h_r_2 <X> lc_trk_g1_2 (25 5) routing sp4_h_l_7 <X> lc_trk_g1_2 -(25 5) routing sp4_h_r_2 <X> lc_trk_g1_2 (25 5) routing sp4_r_v_b_26 <X> lc_trk_g1_2 (25 5) routing sp4_v_b_10 <X> lc_trk_g1_2 -(25 5) routing top_op_2 <X> lc_trk_g1_2 (25 6) routing bnr_op_6 <X> lc_trk_g1_6 (25 6) routing lft_op_6 <X> lc_trk_g1_6 (25 6) routing sp12_h_l_5 <X> lc_trk_g1_6 @@ -1790,13 +1535,10 @@ (25 6) routing sp4_v_b_14 <X> lc_trk_g1_6 (25 6) routing sp4_v_b_6 <X> lc_trk_g1_6 (25 7) routing bnr_op_6 <X> lc_trk_g1_6 -(25 7) routing sp12_h_l_21 <X> lc_trk_g1_6 (25 7) routing sp12_h_l_5 <X> lc_trk_g1_6 (25 7) routing sp4_h_r_22 <X> lc_trk_g1_6 -(25 7) routing sp4_h_r_6 <X> lc_trk_g1_6 (25 7) routing sp4_r_v_b_30 <X> lc_trk_g1_6 (25 7) routing sp4_v_b_14 <X> lc_trk_g1_6 -(25 7) routing top_op_6 <X> lc_trk_g1_6 (25 8) routing bnl_op_2 <X> lc_trk_g2_2 (25 8) routing rgt_op_2 <X> lc_trk_g2_2 (25 8) routing sp12_v_b_2 <X> lc_trk_g2_2 @@ -1811,8 +1553,6 @@ (25 9) routing sp4_h_r_42 <X> lc_trk_g2_2 (25 9) routing sp4_r_v_b_34 <X> lc_trk_g2_2 (25 9) routing sp4_v_t_23 <X> lc_trk_g2_2 -(25 9) routing tnl_op_2 <X> lc_trk_g2_2 -(26 0) routing lc_trk_g0_4 <X> input0_0 (26 0) routing lc_trk_g0_6 <X> input0_0 (26 0) routing lc_trk_g1_5 <X> input0_0 (26 0) routing lc_trk_g1_7 <X> input0_0 @@ -1947,7 +1687,6 @@ (27 0) routing lc_trk_g3_0 <X> wire_bram/ram/WDATA_7 (27 0) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_7 (27 0) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_7 -(27 0) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_7 (27 1) routing lc_trk_g1_1 <X> input0_0 (27 1) routing lc_trk_g1_3 <X> input0_0 (27 1) routing lc_trk_g1_5 <X> input0_0 @@ -1959,7 +1698,6 @@ (27 10) routing lc_trk_g1_1 <X> wire_bram/ram/WDATA_2 (27 10) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_2 (27 10) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_2 -(27 10) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_2 (27 10) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_2 (27 10) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_2 (27 10) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_2 @@ -2005,9 +1743,7 @@ (27 15) routing lc_trk_g3_4 <X> input0_7 (27 15) routing lc_trk_g3_6 <X> input0_7 (27 2) routing lc_trk_g1_1 <X> wire_bram/ram/WDATA_6 -(27 2) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_6 (27 2) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_6 -(27 2) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_6 (27 2) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_6 (27 2) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_6 (27 2) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_6 @@ -2038,7 +1774,6 @@ (27 5) routing lc_trk_g3_7 <X> input0_2 (27 6) routing lc_trk_g1_1 <X> wire_bram/ram/WDATA_4 (27 6) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_4 -(27 6) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_4 (27 6) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_4 (27 6) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_4 (27 6) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_4 @@ -2053,7 +1788,6 @@ (27 7) routing lc_trk_g3_4 <X> input0_3 (27 7) routing lc_trk_g3_6 <X> input0_3 (27 8) routing lc_trk_g1_0 <X> wire_bram/ram/WDATA_3 -(27 8) routing lc_trk_g1_2 <X> wire_bram/ram/WDATA_3 (27 8) routing lc_trk_g1_4 <X> wire_bram/ram/WDATA_3 (27 8) routing lc_trk_g1_6 <X> wire_bram/ram/WDATA_3 (27 8) routing lc_trk_g3_0 <X> wire_bram/ram/WDATA_3 @@ -2075,7 +1809,6 @@ (28 0) routing lc_trk_g3_0 <X> wire_bram/ram/WDATA_7 (28 0) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_7 (28 0) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_7 -(28 0) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_7 (28 1) routing lc_trk_g2_0 <X> input0_0 (28 1) routing lc_trk_g2_2 <X> input0_0 (28 1) routing lc_trk_g2_4 <X> input0_0 @@ -2132,7 +1865,6 @@ (28 15) routing lc_trk_g3_2 <X> input0_7 (28 15) routing lc_trk_g3_4 <X> input0_7 (28 15) routing lc_trk_g3_6 <X> input0_7 -(28 2) routing lc_trk_g2_0 <X> wire_bram/ram/WDATA_6 (28 2) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_6 (28 2) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_6 (28 2) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_6 @@ -2166,7 +1898,6 @@ (28 5) routing lc_trk_g3_7 <X> input0_2 (28 6) routing lc_trk_g2_0 <X> wire_bram/ram/WDATA_4 (28 6) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_4 -(28 6) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_4 (28 6) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_4 (28 6) routing lc_trk_g3_1 <X> wire_bram/ram/WDATA_4 (28 6) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_4 @@ -2211,10 +1942,8 @@ (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g3_0 wire_bram/ram/WDATA_7 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g3_2 wire_bram/ram/WDATA_7 (29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g3_4 wire_bram/ram/WDATA_7 -(29 0) Enable bit of Mux _bram/lcb1_0 => lc_trk_g3_6 wire_bram/ram/WDATA_7 (29 1) Enable bit of Mux _bram/lcb0_0 => lc_trk_g0_0 input0_0 (29 1) Enable bit of Mux _bram/lcb0_0 => lc_trk_g0_2 input0_0 -(29 1) Enable bit of Mux _bram/lcb0_0 => lc_trk_g0_4 input0_0 (29 1) Enable bit of Mux _bram/lcb0_0 => lc_trk_g0_6 input0_0 (29 1) Enable bit of Mux _bram/lcb0_0 => lc_trk_g1_1 input0_0 (29 1) Enable bit of Mux _bram/lcb0_0 => lc_trk_g1_3 input0_0 @@ -2229,13 +1958,11 @@ (29 1) Enable bit of Mux _bram/lcb0_0 => lc_trk_g3_5 input0_0 (29 1) Enable bit of Mux _bram/lcb0_0 => lc_trk_g3_7 input0_0 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g0_0 wire_bram/ram/WDATA_2 -(29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g0_2 wire_bram/ram/WDATA_2 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g0_4 wire_bram/ram/WDATA_2 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g0_6 wire_bram/ram/WDATA_2 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g1_1 wire_bram/ram/WDATA_2 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g1_3 wire_bram/ram/WDATA_2 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g1_5 wire_bram/ram/WDATA_2 -(29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g1_7 wire_bram/ram/WDATA_2 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g2_0 wire_bram/ram/WDATA_2 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g2_2 wire_bram/ram/WDATA_2 (29 10) Enable bit of Mux _bram/lcb1_5 => lc_trk_g2_4 wire_bram/ram/WDATA_2 @@ -2324,15 +2051,10 @@ (29 15) Enable bit of Mux _bram/lcb0_7 => lc_trk_g3_2 input0_7 (29 15) Enable bit of Mux _bram/lcb0_7 => lc_trk_g3_4 input0_7 (29 15) Enable bit of Mux _bram/lcb0_7 => lc_trk_g3_6 input0_7 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g0_0 wire_bram/ram/WDATA_6 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g0_2 wire_bram/ram/WDATA_6 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g0_4 wire_bram/ram/WDATA_6 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g0_6 wire_bram/ram/WDATA_6 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g1_1 wire_bram/ram/WDATA_6 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g1_3 wire_bram/ram/WDATA_6 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g1_5 wire_bram/ram/WDATA_6 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g1_7 wire_bram/ram/WDATA_6 -(29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g2_0 wire_bram/ram/WDATA_6 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g2_2 wire_bram/ram/WDATA_6 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g2_4 wire_bram/ram/WDATA_6 (29 2) Enable bit of Mux _bram/lcb1_1 => lc_trk_g2_6 wire_bram/ram/WDATA_6 @@ -2390,15 +2112,12 @@ (29 5) Enable bit of Mux _bram/lcb0_2 => lc_trk_g3_7 input0_2 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g0_0 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g0_2 wire_bram/ram/WDATA_4 -(29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g0_4 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g0_6 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g1_1 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g1_3 wire_bram/ram/WDATA_4 -(29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g1_5 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g1_7 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g2_0 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g2_2 wire_bram/ram/WDATA_4 -(29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g2_4 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g2_6 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g3_1 wire_bram/ram/WDATA_4 (29 6) Enable bit of Mux _bram/lcb1_3 => lc_trk_g3_3 wire_bram/ram/WDATA_4 @@ -2423,9 +2142,7 @@ (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g0_1 wire_bram/ram/WDATA_3 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g0_3 wire_bram/ram/WDATA_3 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g0_5 wire_bram/ram/WDATA_3 -(29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g0_7 wire_bram/ram/WDATA_3 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g1_0 wire_bram/ram/WDATA_3 -(29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g1_2 wire_bram/ram/WDATA_3 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g1_4 wire_bram/ram/WDATA_3 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g1_6 wire_bram/ram/WDATA_3 (29 8) Enable bit of Mux _bram/lcb1_4 => lc_trk_g2_1 wire_bram/ram/WDATA_3 @@ -2491,7 +2208,6 @@ (30 0) routing lc_trk_g2_5 <X> wire_bram/ram/WDATA_7 (30 0) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_7 (30 0) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_7 -(30 0) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_7 (30 1) routing lc_trk_g0_3 <X> wire_bram/ram/WDATA_7 (30 1) routing lc_trk_g0_7 <X> wire_bram/ram/WDATA_7 (30 1) routing lc_trk_g1_2 <X> wire_bram/ram/WDATA_7 @@ -2499,19 +2215,15 @@ (30 1) routing lc_trk_g2_3 <X> wire_bram/ram/WDATA_7 (30 1) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_7 (30 1) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_7 -(30 1) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_7 (30 10) routing lc_trk_g0_4 <X> wire_bram/ram/WDATA_2 (30 10) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_2 (30 10) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_2 -(30 10) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_2 (30 10) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_2 (30 10) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_2 (30 10) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_2 (30 10) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_2 -(30 11) routing lc_trk_g0_2 <X> wire_bram/ram/WDATA_2 (30 11) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_2 (30 11) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_2 -(30 11) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_2 (30 11) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_2 (30 11) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_2 (30 11) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_2 @@ -2548,18 +2260,14 @@ (30 15) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_0 (30 15) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_0 (30 15) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_0 -(30 2) routing lc_trk_g0_4 <X> wire_bram/ram/WDATA_6 (30 2) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_6 (30 2) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_6 -(30 2) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_6 (30 2) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_6 (30 2) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_6 (30 2) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_6 (30 2) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_6 (30 3) routing lc_trk_g0_2 <X> wire_bram/ram/WDATA_6 (30 3) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_6 -(30 3) routing lc_trk_g1_3 <X> wire_bram/ram/WDATA_6 -(30 3) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_6 (30 3) routing lc_trk_g2_2 <X> wire_bram/ram/WDATA_6 (30 3) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_6 (30 3) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_6 @@ -2580,11 +2288,8 @@ (30 5) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_5 (30 5) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_5 (30 5) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_5 -(30 6) routing lc_trk_g0_4 <X> wire_bram/ram/WDATA_4 (30 6) routing lc_trk_g0_6 <X> wire_bram/ram/WDATA_4 -(30 6) routing lc_trk_g1_5 <X> wire_bram/ram/WDATA_4 (30 6) routing lc_trk_g1_7 <X> wire_bram/ram/WDATA_4 -(30 6) routing lc_trk_g2_4 <X> wire_bram/ram/WDATA_4 (30 6) routing lc_trk_g2_6 <X> wire_bram/ram/WDATA_4 (30 6) routing lc_trk_g3_5 <X> wire_bram/ram/WDATA_4 (30 6) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_4 @@ -2597,7 +2302,6 @@ (30 7) routing lc_trk_g3_3 <X> wire_bram/ram/WDATA_4 (30 7) routing lc_trk_g3_7 <X> wire_bram/ram/WDATA_4 (30 8) routing lc_trk_g0_5 <X> wire_bram/ram/WDATA_3 -(30 8) routing lc_trk_g0_7 <X> wire_bram/ram/WDATA_3 (30 8) routing lc_trk_g1_4 <X> wire_bram/ram/WDATA_3 (30 8) routing lc_trk_g1_6 <X> wire_bram/ram/WDATA_3 (30 8) routing lc_trk_g2_5 <X> wire_bram/ram/WDATA_3 @@ -2605,63 +2309,40 @@ (30 8) routing lc_trk_g3_4 <X> wire_bram/ram/WDATA_3 (30 8) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_3 (30 9) routing lc_trk_g0_3 <X> wire_bram/ram/WDATA_3 -(30 9) routing lc_trk_g0_7 <X> wire_bram/ram/WDATA_3 -(30 9) routing lc_trk_g1_2 <X> wire_bram/ram/WDATA_3 (30 9) routing lc_trk_g1_6 <X> wire_bram/ram/WDATA_3 (30 9) routing lc_trk_g2_3 <X> wire_bram/ram/WDATA_3 (30 9) routing lc_trk_g2_7 <X> wire_bram/ram/WDATA_3 (30 9) routing lc_trk_g3_2 <X> wire_bram/ram/WDATA_3 (30 9) routing lc_trk_g3_6 <X> wire_bram/ram/WDATA_3 -(31 0) routing lc_trk_g0_5 <X> wire_bram/ram/MASK_7 (31 0) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_7 (31 0) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_7 -(31 0) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_7 (31 0) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_7 (31 0) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_7 (31 0) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_7 (31 0) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_7 (31 1) routing lc_trk_g0_3 <X> wire_bram/ram/MASK_7 (31 1) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_7 -(31 1) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_7 -(31 1) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_7 -(31 1) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_7 (31 1) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_7 (31 1) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_7 (31 1) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_7 -(31 10) routing lc_trk_g0_4 <X> wire_bram/ram/MASK_2 -(31 10) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_2 -(31 10) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_2 (31 10) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_2 -(31 10) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_2 (31 10) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_2 (31 10) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_2 (31 10) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_2 -(31 11) routing lc_trk_g0_2 <X> wire_bram/ram/MASK_2 -(31 11) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_2 (31 11) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_2 (31 11) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_2 (31 11) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_2 (31 11) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_2 (31 11) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_2 (31 11) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_2 -(31 12) routing lc_trk_g0_5 <X> wire_bram/ram/MASK_1 -(31 12) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_1 (31 12) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_1 (31 12) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_1 (31 12) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_1 -(31 12) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_1 (31 12) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_1 -(31 12) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_1 -(31 13) routing lc_trk_g0_3 <X> wire_bram/ram/MASK_1 -(31 13) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_1 (31 13) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_1 (31 13) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_1 (31 13) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_1 -(31 13) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_1 -(31 13) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_1 -(31 13) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_1 (31 14) routing lc_trk_g0_4 <X> wire_bram/ram/MASK_0 -(31 14) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_0 (31 14) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_0 (31 14) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_0 (31 14) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_0 @@ -2669,17 +2350,12 @@ (31 14) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_0 (31 14) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_0 (31 15) routing lc_trk_g0_2 <X> wire_bram/ram/MASK_0 -(31 15) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_0 -(31 15) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_0 (31 15) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_0 (31 15) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_0 (31 15) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_0 (31 15) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_0 (31 15) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_0 -(31 2) routing lc_trk_g0_4 <X> wire_bram/ram/MASK_6 (31 2) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_6 -(31 2) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_6 -(31 2) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_6 (31 2) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_6 (31 2) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_6 (31 2) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_6 @@ -2687,37 +2363,23 @@ (31 3) routing lc_trk_g0_2 <X> wire_bram/ram/MASK_6 (31 3) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_6 (31 3) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_6 -(31 3) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_6 -(31 3) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_6 (31 3) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_6 (31 3) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_6 (31 3) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_6 (31 4) routing lc_trk_g0_5 <X> wire_bram/ram/MASK_5 (31 4) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_5 (31 4) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_5 -(31 4) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_5 -(31 4) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_5 (31 4) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_5 -(31 4) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_5 (31 4) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_5 (31 5) routing lc_trk_g0_3 <X> wire_bram/ram/MASK_5 (31 5) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_5 (31 5) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_5 -(31 5) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_5 -(31 5) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_5 (31 5) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_5 (31 5) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_5 (31 5) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_5 -(31 6) routing lc_trk_g0_4 <X> wire_bram/ram/MASK_4 -(31 6) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_4 -(31 6) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_4 (31 6) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_4 -(31 6) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_4 (31 6) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_4 -(31 6) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_4 (31 6) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_4 -(31 7) routing lc_trk_g0_2 <X> wire_bram/ram/MASK_4 -(31 7) routing lc_trk_g0_6 <X> wire_bram/ram/MASK_4 (31 7) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_4 (31 7) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_4 (31 7) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_4 @@ -2732,75 +2394,45 @@ (31 8) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_3 (31 8) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_3 (31 8) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_3 -(31 9) routing lc_trk_g0_3 <X> wire_bram/ram/MASK_3 (31 9) routing lc_trk_g0_7 <X> wire_bram/ram/MASK_3 -(31 9) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_3 (31 9) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_3 (31 9) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_3 (31 9) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_3 (31 9) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_3 (31 9) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_3 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g0_3 wire_bram/ram/MASK_7 -(32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g0_5 wire_bram/ram/MASK_7 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g0_7 wire_bram/ram/MASK_7 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g1_0 wire_bram/ram/MASK_7 -(32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g1_2 wire_bram/ram/MASK_7 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g1_4 wire_bram/ram/MASK_7 -(32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g1_6 wire_bram/ram/MASK_7 -(32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g2_1 wire_bram/ram/MASK_7 -(32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g2_3 wire_bram/ram/MASK_7 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g2_5 wire_bram/ram/MASK_7 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g2_7 wire_bram/ram/MASK_7 -(32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g3_0 wire_bram/ram/MASK_7 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g3_2 wire_bram/ram/MASK_7 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g3_4 wire_bram/ram/MASK_7 (32 0) Enable bit of Mux _bram/lcb3_0 => lc_trk_g3_6 wire_bram/ram/MASK_7 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g0_2 wire_bram/ram/MASK_2 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g0_4 wire_bram/ram/MASK_2 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g0_6 wire_bram/ram/MASK_2 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g1_1 wire_bram/ram/MASK_2 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g1_3 wire_bram/ram/MASK_2 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g1_5 wire_bram/ram/MASK_2 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g1_7 wire_bram/ram/MASK_2 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g2_0 wire_bram/ram/MASK_2 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g2_2 wire_bram/ram/MASK_2 -(32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g2_4 wire_bram/ram/MASK_2 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g2_6 wire_bram/ram/MASK_2 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g3_1 wire_bram/ram/MASK_2 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g3_3 wire_bram/ram/MASK_2 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g3_5 wire_bram/ram/MASK_2 (32 10) Enable bit of Mux _bram/lcb3_5 => lc_trk_g3_7 wire_bram/ram/MASK_2 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g0_1 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g0_3 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g0_5 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g0_7 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g1_0 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g1_2 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g1_4 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g1_6 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g2_1 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g2_3 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g2_5 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g2_7 input2_5 -(32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g3_0 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g3_2 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g3_4 input2_5 (32 11) Enable bit of Mux _bram/lcb2_5 => lc_trk_g3_6 input2_5 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g0_3 wire_bram/ram/MASK_1 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g0_5 wire_bram/ram/MASK_1 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g0_7 wire_bram/ram/MASK_1 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g1_0 wire_bram/ram/MASK_1 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g1_2 wire_bram/ram/MASK_1 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g1_4 wire_bram/ram/MASK_1 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g1_6 wire_bram/ram/MASK_1 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g2_1 wire_bram/ram/MASK_1 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g2_3 wire_bram/ram/MASK_1 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g2_5 wire_bram/ram/MASK_1 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g2_7 wire_bram/ram/MASK_1 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g3_0 wire_bram/ram/MASK_1 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g3_2 wire_bram/ram/MASK_1 (32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g3_4 wire_bram/ram/MASK_1 -(32 12) Enable bit of Mux _bram/lcb3_6 => lc_trk_g3_6 wire_bram/ram/MASK_1 (32 13) Enable bit of Mux _bram/lcb2_6 => lc_trk_g0_0 input2_6 (32 13) Enable bit of Mux _bram/lcb2_6 => lc_trk_g0_2 input2_6 (32 13) Enable bit of Mux _bram/lcb2_6 => lc_trk_g0_4 input2_6 @@ -2819,12 +2451,9 @@ (32 13) Enable bit of Mux _bram/lcb2_6 => lc_trk_g3_7 input2_6 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g0_2 wire_bram/ram/MASK_0 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g0_4 wire_bram/ram/MASK_0 -(32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g0_6 wire_bram/ram/MASK_0 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g1_1 wire_bram/ram/MASK_0 -(32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g1_3 wire_bram/ram/MASK_0 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g1_5 wire_bram/ram/MASK_0 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g1_7 wire_bram/ram/MASK_0 -(32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g2_0 wire_bram/ram/MASK_0 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g2_2 wire_bram/ram/MASK_0 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g2_4 wire_bram/ram/MASK_0 (32 14) Enable bit of Mux _bram/lcb3_7 => lc_trk_g2_6 wire_bram/ram/MASK_0 @@ -2849,14 +2478,8 @@ (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g3_4 input2_7 (32 15) Enable bit of Mux _bram/lcb2_7 => lc_trk_g3_6 input2_7 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g0_2 wire_bram/ram/MASK_6 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g0_4 wire_bram/ram/MASK_6 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g0_6 wire_bram/ram/MASK_6 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g1_1 wire_bram/ram/MASK_6 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g1_3 wire_bram/ram/MASK_6 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g1_5 wire_bram/ram/MASK_6 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g1_7 wire_bram/ram/MASK_6 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g2_0 wire_bram/ram/MASK_6 -(32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g2_2 wire_bram/ram/MASK_6 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g2_4 wire_bram/ram/MASK_6 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g2_6 wire_bram/ram/MASK_6 (32 2) Enable bit of Mux _bram/lcb3_1 => lc_trk_g3_1 wire_bram/ram/MASK_6 @@ -2866,38 +2489,23 @@ (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g0_3 wire_bram/ram/MASK_5 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g0_5 wire_bram/ram/MASK_5 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g0_7 wire_bram/ram/MASK_5 -(32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g1_0 wire_bram/ram/MASK_5 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g1_2 wire_bram/ram/MASK_5 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g1_4 wire_bram/ram/MASK_5 -(32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g1_6 wire_bram/ram/MASK_5 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g2_1 wire_bram/ram/MASK_5 -(32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g2_3 wire_bram/ram/MASK_5 -(32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g2_5 wire_bram/ram/MASK_5 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g2_7 wire_bram/ram/MASK_5 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g3_0 wire_bram/ram/MASK_5 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g3_2 wire_bram/ram/MASK_5 -(32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g3_4 wire_bram/ram/MASK_5 (32 4) Enable bit of Mux _bram/lcb3_2 => lc_trk_g3_6 wire_bram/ram/MASK_5 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g0_2 wire_bram/ram/MASK_4 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g0_4 wire_bram/ram/MASK_4 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g0_6 wire_bram/ram/MASK_4 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g1_1 wire_bram/ram/MASK_4 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g1_3 wire_bram/ram/MASK_4 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g1_5 wire_bram/ram/MASK_4 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g1_7 wire_bram/ram/MASK_4 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g2_0 wire_bram/ram/MASK_4 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g2_2 wire_bram/ram/MASK_4 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g2_4 wire_bram/ram/MASK_4 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g2_6 wire_bram/ram/MASK_4 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g3_1 wire_bram/ram/MASK_4 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g3_3 wire_bram/ram/MASK_4 -(32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g3_5 wire_bram/ram/MASK_4 (32 6) Enable bit of Mux _bram/lcb3_3 => lc_trk_g3_7 wire_bram/ram/MASK_4 -(32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g0_3 wire_bram/ram/MASK_3 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g0_5 wire_bram/ram/MASK_3 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g0_7 wire_bram/ram/MASK_3 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g1_0 wire_bram/ram/MASK_3 -(32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g1_2 wire_bram/ram/MASK_3 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g1_4 wire_bram/ram/MASK_3 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g1_6 wire_bram/ram/MASK_3 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g2_1 wire_bram/ram/MASK_3 @@ -2908,17 +2516,12 @@ (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g3_2 wire_bram/ram/MASK_3 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g3_4 wire_bram/ram/MASK_3 (32 8) Enable bit of Mux _bram/lcb3_4 => lc_trk_g3_6 wire_bram/ram/MASK_3 -(33 0) routing lc_trk_g2_1 <X> wire_bram/ram/MASK_7 -(33 0) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_7 (33 0) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_7 (33 0) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_7 -(33 0) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_7 (33 0) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_7 (33 0) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_7 (33 0) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_7 -(33 10) routing lc_trk_g2_0 <X> wire_bram/ram/MASK_2 (33 10) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_2 -(33 10) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_2 (33 10) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_2 (33 10) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_2 (33 10) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_2 @@ -2928,18 +2531,13 @@ (33 11) routing lc_trk_g2_3 <X> input2_5 (33 11) routing lc_trk_g2_5 <X> input2_5 (33 11) routing lc_trk_g2_7 <X> input2_5 -(33 11) routing lc_trk_g3_0 <X> input2_5 (33 11) routing lc_trk_g3_2 <X> input2_5 (33 11) routing lc_trk_g3_4 <X> input2_5 (33 11) routing lc_trk_g3_6 <X> input2_5 -(33 12) routing lc_trk_g2_1 <X> wire_bram/ram/MASK_1 (33 12) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_1 (33 12) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_1 -(33 12) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_1 (33 12) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_1 -(33 12) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_1 (33 12) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_1 -(33 12) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_1 (33 13) routing lc_trk_g2_0 <X> input2_6 (33 13) routing lc_trk_g2_2 <X> input2_6 (33 13) routing lc_trk_g2_4 <X> input2_6 @@ -2948,7 +2546,6 @@ (33 13) routing lc_trk_g3_3 <X> input2_6 (33 13) routing lc_trk_g3_5 <X> input2_6 (33 13) routing lc_trk_g3_7 <X> input2_6 -(33 14) routing lc_trk_g2_0 <X> wire_bram/ram/MASK_0 (33 14) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_0 (33 14) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_0 (33 14) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_0 @@ -2964,8 +2561,6 @@ (33 15) routing lc_trk_g3_2 <X> input2_7 (33 15) routing lc_trk_g3_4 <X> input2_7 (33 15) routing lc_trk_g3_6 <X> input2_7 -(33 2) routing lc_trk_g2_0 <X> wire_bram/ram/MASK_6 -(33 2) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_6 (33 2) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_6 (33 2) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_6 (33 2) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_6 @@ -2973,20 +2568,14 @@ (33 2) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_6 (33 2) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_6 (33 4) routing lc_trk_g2_1 <X> wire_bram/ram/MASK_5 -(33 4) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_5 -(33 4) routing lc_trk_g2_5 <X> wire_bram/ram/MASK_5 (33 4) routing lc_trk_g2_7 <X> wire_bram/ram/MASK_5 (33 4) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_5 (33 4) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_5 -(33 4) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_5 (33 4) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_5 -(33 6) routing lc_trk_g2_0 <X> wire_bram/ram/MASK_4 (33 6) routing lc_trk_g2_2 <X> wire_bram/ram/MASK_4 -(33 6) routing lc_trk_g2_4 <X> wire_bram/ram/MASK_4 (33 6) routing lc_trk_g2_6 <X> wire_bram/ram/MASK_4 (33 6) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_4 (33 6) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_4 -(33 6) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_4 (33 6) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_4 (33 8) routing lc_trk_g2_1 <X> wire_bram/ram/MASK_3 (33 8) routing lc_trk_g2_3 <X> wire_bram/ram/MASK_3 @@ -2997,37 +2586,24 @@ (33 8) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_3 (33 8) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_3 (34 0) routing lc_trk_g1_0 <X> wire_bram/ram/MASK_7 -(34 0) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_7 (34 0) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_7 -(34 0) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_7 -(34 0) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_7 (34 0) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_7 (34 0) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_7 (34 0) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_7 -(34 10) routing lc_trk_g1_1 <X> wire_bram/ram/MASK_2 (34 10) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_2 -(34 10) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_2 (34 10) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_2 (34 10) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_2 (34 10) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_2 (34 10) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_2 (34 10) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_2 -(34 11) routing lc_trk_g1_0 <X> input2_5 -(34 11) routing lc_trk_g1_2 <X> input2_5 -(34 11) routing lc_trk_g1_4 <X> input2_5 -(34 11) routing lc_trk_g1_6 <X> input2_5 -(34 11) routing lc_trk_g3_0 <X> input2_5 (34 11) routing lc_trk_g3_2 <X> input2_5 (34 11) routing lc_trk_g3_4 <X> input2_5 (34 11) routing lc_trk_g3_6 <X> input2_5 -(34 12) routing lc_trk_g1_0 <X> wire_bram/ram/MASK_1 (34 12) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_1 (34 12) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_1 (34 12) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_1 (34 12) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_1 -(34 12) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_1 (34 12) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_1 -(34 12) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_1 (34 13) routing lc_trk_g1_1 <X> input2_6 (34 13) routing lc_trk_g1_3 <X> input2_6 (34 13) routing lc_trk_g1_5 <X> input2_6 @@ -3037,7 +2613,6 @@ (34 13) routing lc_trk_g3_5 <X> input2_6 (34 13) routing lc_trk_g3_7 <X> input2_6 (34 14) routing lc_trk_g1_1 <X> wire_bram/ram/MASK_0 -(34 14) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_0 (34 14) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_0 (34 14) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_0 (34 14) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_0 @@ -3052,32 +2627,22 @@ (34 15) routing lc_trk_g3_2 <X> input2_7 (34 15) routing lc_trk_g3_4 <X> input2_7 (34 15) routing lc_trk_g3_6 <X> input2_7 -(34 2) routing lc_trk_g1_1 <X> wire_bram/ram/MASK_6 (34 2) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_6 -(34 2) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_6 -(34 2) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_6 (34 2) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_6 (34 2) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_6 (34 2) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_6 (34 2) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_6 -(34 4) routing lc_trk_g1_0 <X> wire_bram/ram/MASK_5 (34 4) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_5 (34 4) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_5 -(34 4) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_5 (34 4) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_5 (34 4) routing lc_trk_g3_2 <X> wire_bram/ram/MASK_5 -(34 4) routing lc_trk_g3_4 <X> wire_bram/ram/MASK_5 (34 4) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_5 -(34 6) routing lc_trk_g1_1 <X> wire_bram/ram/MASK_4 (34 6) routing lc_trk_g1_3 <X> wire_bram/ram/MASK_4 -(34 6) routing lc_trk_g1_5 <X> wire_bram/ram/MASK_4 (34 6) routing lc_trk_g1_7 <X> wire_bram/ram/MASK_4 (34 6) routing lc_trk_g3_1 <X> wire_bram/ram/MASK_4 (34 6) routing lc_trk_g3_3 <X> wire_bram/ram/MASK_4 -(34 6) routing lc_trk_g3_5 <X> wire_bram/ram/MASK_4 (34 6) routing lc_trk_g3_7 <X> wire_bram/ram/MASK_4 (34 8) routing lc_trk_g1_0 <X> wire_bram/ram/MASK_3 -(34 8) routing lc_trk_g1_2 <X> wire_bram/ram/MASK_3 (34 8) routing lc_trk_g1_4 <X> wire_bram/ram/MASK_3 (34 8) routing lc_trk_g1_6 <X> wire_bram/ram/MASK_3 (34 8) routing lc_trk_g3_0 <X> wire_bram/ram/MASK_3 @@ -3086,16 +2651,11 @@ (34 8) routing lc_trk_g3_6 <X> wire_bram/ram/MASK_3 (35 10) routing lc_trk_g0_5 <X> input2_5 (35 10) routing lc_trk_g0_7 <X> input2_5 -(35 10) routing lc_trk_g1_4 <X> input2_5 -(35 10) routing lc_trk_g1_6 <X> input2_5 (35 10) routing lc_trk_g2_5 <X> input2_5 (35 10) routing lc_trk_g2_7 <X> input2_5 (35 10) routing lc_trk_g3_4 <X> input2_5 (35 10) routing lc_trk_g3_6 <X> input2_5 -(35 11) routing lc_trk_g0_3 <X> input2_5 (35 11) routing lc_trk_g0_7 <X> input2_5 -(35 11) routing lc_trk_g1_2 <X> input2_5 -(35 11) routing lc_trk_g1_6 <X> input2_5 (35 11) routing lc_trk_g2_3 <X> input2_5 (35 11) routing lc_trk_g2_7 <X> input2_5 (35 11) routing lc_trk_g3_2 <X> input2_5 @@ -3133,21 +2693,16 @@ (35 15) routing lc_trk_g3_2 <X> input2_7 (35 15) routing lc_trk_g3_6 <X> input2_7 (36 0) Enable bit of Mux _out_links/OutMux8_0 => wire_bram/ram/RDATA_7 sp4_h_l_21 -(36 1) Enable bit of Mux _out_links/OutMux6_0 => wire_bram/ram/RDATA_7 sp4_h_r_0 -(36 10) Enable bit of Mux _out_links/OutMux8_5 => wire_bram/ram/RDATA_2 sp4_h_r_42 (36 11) Enable bit of Mux _out_links/OutMux6_5 => wire_bram/ram/RDATA_2 sp4_h_r_10 (36 12) Enable bit of Mux _out_links/OutMux8_6 => wire_bram/ram/RDATA_1 sp4_h_r_44 (36 13) Enable bit of Mux _out_links/OutMux6_6 => wire_bram/ram/RDATA_1 sp4_h_r_12 -(36 14) Enable bit of Mux _out_links/OutMux8_7 => wire_bram/ram/RDATA_0 sp4_h_r_46 (36 15) Enable bit of Mux _out_links/OutMux6_7 => wire_bram/ram/RDATA_0 sp4_h_l_3 (36 2) Enable bit of Mux _out_links/OutMux8_1 => wire_bram/ram/RDATA_6 sp4_h_r_34 -(36 3) Enable bit of Mux _out_links/OutMux6_1 => wire_bram/ram/RDATA_6 sp4_h_r_2 (36 4) Enable bit of Mux _out_links/OutMux8_2 => wire_bram/ram/RDATA_5 sp4_h_r_36 (36 5) Enable bit of Mux _out_links/OutMux6_2 => wire_bram/ram/RDATA_5 sp4_h_r_4 (36 6) Enable bit of Mux _out_links/OutMux8_3 => wire_bram/ram/RDATA_4 sp4_h_l_27 (36 7) Enable bit of Mux _out_links/OutMux6_3 => wire_bram/ram/RDATA_4 sp4_h_r_6 (36 8) Enable bit of Mux _out_links/OutMux8_4 => wire_bram/ram/RDATA_3 sp4_h_l_29 -(36 9) Enable bit of Mux _out_links/OutMux6_4 => wire_bram/ram/RDATA_3 sp4_h_r_8 (37 0) Enable bit of Mux _out_links/OutMux5_0 => wire_bram/ram/RDATA_7 sp12_h_r_8 (37 1) Enable bit of Mux _out_links/OutMux7_0 => wire_bram/ram/RDATA_7 sp4_h_l_5 (37 10) Enable bit of Mux _out_links/OutMux4_5 => wire_bram/ram/RDATA_2 sp12_h_r_2 @@ -3166,7 +2721,6 @@ (37 9) Enable bit of Mux _out_links/OutMux7_4 => wire_bram/ram/RDATA_3 sp4_h_l_13 (38 0) Enable bit of Mux _out_links/OutMux2_0 => wire_bram/ram/RDATA_7 sp4_v_t_21 (38 1) Enable bit of Mux _out_links/OutMux0_0 => wire_bram/ram/RDATA_7 sp4_v_b_0 -(38 10) Enable bit of Mux _out_links/OutMux1_5 => wire_bram/ram/RDATA_2 sp4_v_b_26 (38 11) Enable bit of Mux _out_links/OutMux5_5 => wire_bram/ram/RDATA_2 sp12_h_r_18 (38 12) Enable bit of Mux _out_links/OutMux1_6 => wire_bram/ram/RDATA_1 sp4_v_b_28 (38 13) Enable bit of Mux _out_links/OutMux5_6 => wire_bram/ram/RDATA_1 sp12_h_r_20 @@ -3260,7 +2814,6 @@ (4 9) routing sp4_h_l_47 <X> sp4_h_r_6 (4 9) routing sp4_v_b_0 <X> sp4_h_r_6 (4 9) routing sp4_v_t_36 <X> sp4_h_r_6 -(40 0) Enable bit of Mux _out_links/OutMuxa_0 => wire_bram/ram/RDATA_7 sp4_r_v_b_17 (40 1) Enable bit of Mux _out_links/OutMux4_0 => wire_bram/ram/RDATA_7 sp12_v_b_16 (40 10) Enable bit of Mux _out_links/OutMuxa_5 => wire_bram/ram/RDATA_2 sp4_r_v_b_27 (40 11) Enable bit of Mux _out_links/OutMux3_5 => wire_bram/ram/RDATA_2 sp12_v_t_9 @@ -3268,7 +2821,6 @@ (40 13) Enable bit of Mux _out_links/OutMux3_6 => wire_bram/ram/RDATA_1 sp12_v_b_12 (40 14) Enable bit of Mux _out_links/OutMuxa_7 => wire_bram/ram/RDATA_0 sp4_r_v_b_31 (40 15) Enable bit of Mux _out_links/OutMux3_7 => wire_bram/ram/RDATA_0 sp12_v_b_14 -(40 2) Enable bit of Mux _out_links/OutMuxa_1 => wire_bram/ram/RDATA_6 sp4_r_v_b_19 (40 3) Enable bit of Mux _out_links/OutMux4_1 => wire_bram/ram/RDATA_6 sp12_v_t_17 (40 4) Enable bit of Mux _out_links/OutMuxa_2 => wire_bram/ram/RDATA_5 sp4_r_v_b_21 (40 5) Enable bit of Mux _out_links/OutMux4_2 => wire_bram/ram/RDATA_5 sp12_v_t_19 @@ -3277,7 +2829,6 @@ (40 8) Enable bit of Mux _out_links/OutMuxa_4 => wire_bram/ram/RDATA_3 sp4_r_v_b_25 (40 9) Enable bit of Mux _out_links/OutMux3_4 => wire_bram/ram/RDATA_3 sp12_v_t_7 (41 0) Enable bit of Mux _out_links/OutMuxb_0 => wire_bram/ram/RDATA_7 sp4_r_v_b_33 -(41 1) Enable bit of Mux _out_links/OutMux9_0 => wire_bram/ram/RDATA_7 sp4_r_v_b_1 (41 10) Enable bit of Mux _out_links/OutMuxb_5 => wire_bram/ram/RDATA_2 sp4_r_v_b_43 (41 11) Enable bit of Mux _out_links/OutMux9_5 => wire_bram/ram/RDATA_2 sp4_r_v_b_11 (41 12) Enable bit of Mux _out_links/OutMuxb_6 => wire_bram/ram/RDATA_1 sp4_r_v_b_45 @@ -3433,20 +2984,16 @@ (7 4) Cascade buffer Enable bit: MEMT_LC00_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC01_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC02_inmux00_bram_cbit_5 -(7 4) Cascade buffer Enable bit: MEMT_LC03_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC04_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC05_inmux00_bram_cbit_5 -(7 4) Cascade buffer Enable bit: MEMT_LC06_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC06_inmux02_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC07_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC07_inmux02_bram_cbit_5 (7 5) Cascade bit: MEMT_LC00_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC01_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC02_inmux00_bram_cbit_4 -(7 5) Cascade bit: MEMT_LC03_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC04_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC05_inmux00_bram_cbit_4 -(7 5) Cascade bit: MEMT_LC06_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC06_inmux02_bram_cbit_4 (7 5) Cascade bit: MEMT_LC07_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC07_inmux02_bram_cbit_4 |