diff options
| -rw-r--r-- | icetime/icetime.cc | 27 | ||||
| -rw-r--r-- | icetime/mktest.py | 83 |
2 files changed, 63 insertions, 47 deletions
diff --git a/icetime/icetime.cc b/icetime/icetime.cc index 84cbfc2..679e884 100644 --- a/icetime/icetime.cc +++ b/icetime/icetime.cc @@ -12,6 +12,8 @@ #include <map> #include <set> +#define ZSPAN 1 + FILE *fin, *fout; std::string config_device, selected_package; @@ -33,6 +35,14 @@ struct net_segment_t net_segment_t(int x, int y, int net, std::string name) : x(x), y(y), net(net), name(name) { } + bool operator==(const net_segment_t &other) const { + return (x == other.x) && (y == other.y) && (name == other.name); + } + + bool operator!=(const net_segment_t &other) const { + return (x != other.x) || (y != other.y) || (name != other.name); + } + bool operator<(const net_segment_t &other) const { if (x != other.x) return x < other.x; @@ -807,13 +817,16 @@ struct make_interconn_worker_t for (auto &seg : queue) { + if (seg != src) + assert(interconn_src.count(seg) == 0); + if (interconn_dst.count(seg)) targets.insert(seg); if (seg_connections.count(seg)) for (auto &child : seg_connections.at(seg)) { - if (distances.count(child) != 0) + if (distances.count(child) != 0 || interconn_src.count(child) != 0) continue; reverse_edges[child] = seg; @@ -891,12 +904,12 @@ struct make_interconn_worker_t if (trg.name.substr(0, 6) == "span4_" || trg.name.substr(0, 4) == "sp4_") { bool horiz = trg.name.substr(0, 6) == "sp4_h_"; - int count_length = 0; + int count_length = -1; while (seg_parents.count(*cursor) && cursor->net == trg.net) { horiz = horiz || (cursor->name.substr(0, 6) == "sp4_h_"); cursor = &seg_parents.at(*cursor); - // count_length++; + count_length++; } if (cursor->net == trg.net) @@ -911,7 +924,7 @@ struct make_interconn_worker_t tname().c_str(), seg_name(*cursor).c_str(), seg_name(trg).c_str())); } else { extra_vlog.push_back(stringf(" Span4Mux_%c%d %s (.I(%s), .O(%s));\n", - horiz ? 'h' : 'v', count_length, tname().c_str(), + horiz ? 'h' : 'v', ZSPAN ? 0 : count_length, tname().c_str(), seg_name(*cursor).c_str(), seg_name(trg).c_str())); } @@ -923,19 +936,19 @@ struct make_interconn_worker_t if (trg.name.substr(0, 7) == "span12_" || trg.name.substr(0, 5) == "sp12_") { bool horiz = trg.name.substr(0, 7) == "sp12_h_"; - int count_length = 0; + int count_length = -1; while (seg_parents.count(*cursor) && cursor->net == trg.net) { horiz = horiz || (cursor->name.substr(0, 7) == "sp12_h_"); cursor = &seg_parents.at(*cursor); - // count_length++; + count_length++; } if (cursor->net == trg.net) goto skip_to_cursor; extra_vlog.push_back(stringf(" Span12Mux_%c%d %s (.I(%s), .O(%s));\n", - horiz ? 'h' : 'v', count_length, tname().c_str(), + horiz ? 'h' : 'v', ZSPAN ? 0 : count_length, tname().c_str(), seg_name(*cursor).c_str(), seg_name(trg).c_str())); goto continue_at_cursor; diff --git a/icetime/mktest.py b/icetime/mktest.py index 5154b02..cf1046e 100644 --- a/icetime/mktest.py +++ b/icetime/mktest.py @@ -41,6 +41,7 @@ with open("%s.ys" % sys.argv[1], "w") as f: print("read_verilog %s_out.v" % sys.argv[1], file=f) print("prep", file=f) print("equiv_make top chip equiv", file=f) + print("check -assert", file=f) print("cd equiv", file=f) print("script %s.lc" % sys.argv[1], file=f) print("rename -hide w:N_*", file=f) @@ -54,46 +55,48 @@ os.rename("%s.v" % sys.argv[1], "%s_in.v" % sys.argv[1]) with open("%s_ref.v" % sys.argv[1], "w") as f: for line in open("%s.vsb" % sys.argv[1], "r"): - line = line.replace(" Span4Mux_s0_h ", " Span4Mux_h0 ") # " Span4Mux_h0 ") - line = line.replace(" Span4Mux_s1_h ", " Span4Mux_h0 ") # " Span4Mux_h1 ") - line = line.replace(" Span4Mux_s2_h ", " Span4Mux_h0 ") # " Span4Mux_h2 ") - line = line.replace(" Span4Mux_s3_h ", " Span4Mux_h0 ") # " Span4Mux_h3 ") - line = line.replace(" Span4Mux_h ", " Span4Mux_h0 ") # " Span4Mux_h4 ") - - line = line.replace(" Span4Mux_s0_v ", " Span4Mux_v0 ") # " Span4Mux_v0 ") - line = line.replace(" Span4Mux_s1_v ", " Span4Mux_v0 ") # " Span4Mux_v1 ") - line = line.replace(" Span4Mux_s2_v ", " Span4Mux_v0 ") # " Span4Mux_v2 ") - line = line.replace(" Span4Mux_s3_v ", " Span4Mux_v0 ") # " Span4Mux_v3 ") - line = line.replace(" Span4Mux_v ", " Span4Mux_v0 ") # " Span4Mux_v4 ") - line = line.replace(" Span4Mux ", " Span4Mux_v0 ") # " Span4Mux_v4 ") - - line = line.replace(" Span12Mux_s0_h ", " Span12Mux_h0 ") # " Span12Mux_h0 ") - line = line.replace(" Span12Mux_s1_h ", " Span12Mux_h0 ") # " Span12Mux_h1 ") - line = line.replace(" Span12Mux_s2_h ", " Span12Mux_h0 ") # " Span12Mux_h2 ") - line = line.replace(" Span12Mux_s3_h ", " Span12Mux_h0 ") # " Span12Mux_h3 ") - line = line.replace(" Span12Mux_s4_h ", " Span12Mux_h0 ") # " Span12Mux_h4 ") - line = line.replace(" Span12Mux_s5_h ", " Span12Mux_h0 ") # " Span12Mux_h5 ") - line = line.replace(" Span12Mux_s6_h ", " Span12Mux_h0 ") # " Span12Mux_h6 ") - line = line.replace(" Span12Mux_s7_h ", " Span12Mux_h0 ") # " Span12Mux_h7 ") - line = line.replace(" Span12Mux_s8_h ", " Span12Mux_h0 ") # " Span12Mux_h8 ") - line = line.replace(" Span12Mux_s9_h ", " Span12Mux_h0 ") # " Span12Mux_h9 ") - line = line.replace(" Span12Mux_s10_h ", " Span12Mux_h0 ") # " Span12Mux_h10 ") - line = line.replace(" Span12Mux_s11_h ", " Span12Mux_h0 ") # " Span12Mux_h11 ") - line = line.replace(" Span12Mux ", " Span12Mux_h0 ") # " Span12Mux_h12 ") - - line = line.replace(" Span12Mux_s0_v ", " Span12Mux_v0 ") # " Span12Mux_v0 ") - line = line.replace(" Span12Mux_s1_v ", " Span12Mux_v0 ") # " Span12Mux_v1 ") - line = line.replace(" Span12Mux_s2_v ", " Span12Mux_v0 ") # " Span12Mux_v2 ") - line = line.replace(" Span12Mux_s3_v ", " Span12Mux_v0 ") # " Span12Mux_v3 ") - line = line.replace(" Span12Mux_s4_v ", " Span12Mux_v0 ") # " Span12Mux_v4 ") - line = line.replace(" Span12Mux_s5_v ", " Span12Mux_v0 ") # " Span12Mux_v5 ") - line = line.replace(" Span12Mux_s6_v ", " Span12Mux_v0 ") # " Span12Mux_v6 ") - line = line.replace(" Span12Mux_s7_v ", " Span12Mux_v0 ") # " Span12Mux_v7 ") - line = line.replace(" Span12Mux_s8_v ", " Span12Mux_v0 ") # " Span12Mux_v8 ") - line = line.replace(" Span12Mux_s9_v ", " Span12Mux_v0 ") # " Span12Mux_v9 ") - line = line.replace(" Span12Mux_s10_v ", " Span12Mux_v0 ") # " Span12Mux_v10 ") - line = line.replace(" Span12Mux_s11_v ", " Span12Mux_v0 ") # " Span12Mux_v11 ") - line = line.replace(" Span12Mux_v ", " Span12Mux_v0 ") # " Span12Mux_v12 ") + zspan = True + + line = line.replace(" Span4Mux_s0_h ", " Span4Mux_h0 " if zspan else " Span4Mux_h0 ") + line = line.replace(" Span4Mux_s1_h ", " Span4Mux_h0 " if zspan else " Span4Mux_h1 ") + line = line.replace(" Span4Mux_s2_h ", " Span4Mux_h0 " if zspan else " Span4Mux_h2 ") + line = line.replace(" Span4Mux_s3_h ", " Span4Mux_h0 " if zspan else " Span4Mux_h3 ") + line = line.replace(" Span4Mux_h ", " Span4Mux_h0 " if zspan else " Span4Mux_h4 ") + + line = line.replace(" Span4Mux_s0_v ", " Span4Mux_v0 " if zspan else " Span4Mux_v0 ") + line = line.replace(" Span4Mux_s1_v ", " Span4Mux_v0 " if zspan else " Span4Mux_v1 ") + line = line.replace(" Span4Mux_s2_v ", " Span4Mux_v0 " if zspan else " Span4Mux_v2 ") + line = line.replace(" Span4Mux_s3_v ", " Span4Mux_v0 " if zspan else " Span4Mux_v3 ") + line = line.replace(" Span4Mux_v ", " Span4Mux_v0 " if zspan else " Span4Mux_v4 ") + line = line.replace(" Span4Mux ", " Span4Mux_v0 " if zspan else " Span4Mux_v4 ") + + line = line.replace(" Span12Mux_s0_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h0 ") + line = line.replace(" Span12Mux_s1_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h1 ") + line = line.replace(" Span12Mux_s2_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h2 ") + line = line.replace(" Span12Mux_s3_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h3 ") + line = line.replace(" Span12Mux_s4_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h4 ") + line = line.replace(" Span12Mux_s5_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h5 ") + line = line.replace(" Span12Mux_s6_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h6 ") + line = line.replace(" Span12Mux_s7_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h7 ") + line = line.replace(" Span12Mux_s8_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h8 ") + line = line.replace(" Span12Mux_s9_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h9 ") + line = line.replace(" Span12Mux_s10_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h10 ") + line = line.replace(" Span12Mux_s11_h ", " Span12Mux_h0 " if zspan else " Span12Mux_h11 ") + line = line.replace(" Span12Mux ", " Span12Mux_h0 " if zspan else " Span12Mux_h12 ") + + line = line.replace(" Span12Mux_s0_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v0 ") + line = line.replace(" Span12Mux_s1_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v1 ") + line = line.replace(" Span12Mux_s2_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v2 ") + line = line.replace(" Span12Mux_s3_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v3 ") + line = line.replace(" Span12Mux_s4_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v4 ") + line = line.replace(" Span12Mux_s5_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v5 ") + line = line.replace(" Span12Mux_s6_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v6 ") + line = line.replace(" Span12Mux_s7_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v7 ") + line = line.replace(" Span12Mux_s8_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v8 ") + line = line.replace(" Span12Mux_s9_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v9 ") + line = line.replace(" Span12Mux_s10_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v10 ") + line = line.replace(" Span12Mux_s11_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v11 ") + line = line.replace(" Span12Mux_v ", " Span12Mux_v0 " if zspan else " Span12Mux_v12 ") f.write(line) |