Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | | Merge pull request #122 from daveshah1/iceprog-up2 | Clifford Wolf | 2018-02-09 | 1 | -3/+3 | |
|\ \ | |/ |/| | Add out-of-the-box FT232H support (for Upduino 2, etc) | |||||
| * | Add out-of-the-box FT232H support (for Upduino 2, etc) | David Shah | 2018-02-09 | 1 | -3/+3 | |
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* | Remove up5k_mac16 "example" and add README to up5k_rgb and icebreaker | Clifford Wolf | 2018-02-06 | 6 | -123/+4 | |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
* | Add icebreaker example project | Clifford Wolf | 2018-02-06 | 4 | -0/+153 | |
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* | Merge pull request #119 from daveshah1/up5k_improve | Clifford Wolf | 2018-01-30 | 12 | -3503/+18362 | |
|\ | | | | | UltraPlus Timing Analysis Improvements | |||||
| * | Tidy up | David Shah | 2018-01-30 | 3 | -1154/+0 | |
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| * | Misc UltraPlus fixes | David Shah | 2018-01-30 | 1 | -29/+35 | |
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| * | Updated 5k timing data, icetime regression fix | David Shah | 2018-01-29 | 6 | -12479/+13778 | |
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| * | DSP related fixes | David Shah | 2018-01-28 | 2 | -269/+2 | |
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| * | Working DSP timing analysis | David Shah | 2018-01-26 | 2 | -3/+33 | |
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| * | Work on timing analysis of DSPs | David Shah | 2018-01-26 | 1 | -8/+196 | |
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| * | Parse extra cells in icetime | David Shah | 2018-01-23 | 1 | -1/+50 | |
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| * | More DSP timing fuzzing, start adding new tiles to icetime | David Shah | 2018-01-22 | 3 | -2/+3710 | |
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| * | Seperate different DSP configs in timing data | David Shah | 2018-01-22 | 11 | -2532/+13532 | |
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* | | Merge pull request #118 from daveshah1/up5k_fix_timing | Clifford Wolf | 2018-01-20 | 2 | -143/+88 | |
|\| | | | | | Fix 5k Timing Data | |||||
| * | Fix 5k timing data | David Shah | 2018-01-20 | 2 | -143/+88 | |
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* | Merge pull request #116 from daveshah1/up5k_misc_fixes | Clifford Wolf | 2018-01-16 | 14 | -10109/+270 | |
|\ | | | | | Miscellaneous UltraPlus fixes and improvements | |||||
| * | Add example for 5k UWG30 package | David Shah | 2018-01-16 | 2 | -0/+39 | |
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| * | I³C IO reverse engineered and documented | David Shah | 2018-01-16 | 3 | -0/+56 | |
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| * | Add 5k UWG30 ieren data to db | David Shah | 2018-01-16 | 1 | -1/+5 | |
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| * | Remove seperate 5k RAM DB and share with 8k instead | David Shah | 2018-01-16 | 7 | -10016/+13 | |
| | | | | | | | | | | This should ensure that the 5k RAM routing entries are now complete, fixing #115 | |||||
| * | Add pinout for 5k UWG30 package | David Shah | 2018-01-16 | 1 | -0/+23 | |
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| * | Add SPI enable bits to docs | David Shah | 2018-01-16 | 1 | -0/+4 | |
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| * | HFOSC trimming info | David Shah | 2018-01-16 | 2 | -1/+20 | |
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| * | New UltraPlus corner tracing algorithm | David Shah | 2018-01-16 | 1 | -87/+86 | |
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| * | Misc routing tweaks | David Shah | 2018-01-16 | 1 | -3/+7 | |
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| * | Figure out missing SPI config bits, and add to chipdb | David Shah | 2018-01-16 | 3 | -2/+18 | |
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* | | Add "iceprog -e" | Clifford Wolf | 2018-01-02 | 1 | -20/+42 | |
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* | | Merge pull request #113 from cr1901/nosleep | Clifford Wolf | 2017-12-31 | 1 | -20/+65 | |
|\ \ | | | | | | | Add option to `icepack` to disable SPI Deep Power-Down command in bitstream. | |||||
| * | | Enable writing nosleep config bit into output bitstream. | William D. Jones | 2017-12-31 | 1 | -11/+30 | |
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| * | | Add nosleep field to FpgaConfig- read_bits recognizes the option. | William D. Jones | 2017-12-31 | 1 | -9/+35 | |
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* | | Merge pull request #112 from mithro/patch-2 | Clifford Wolf | 2017-12-09 | 1 | -0/+13 | |
|\ \ | | | | | | | Creating COPYING file. | |||||
| * | | Creating COPYING file. | Tim Ansell | 2017-12-08 | 1 | -0/+13 | |
|/ / | | | | | So GitHub automatically detects the license of the repo. | |||||
* | | Merge pull request #110 from daveshah1/up5k_ip | Clifford Wolf | 2017-11-28 | 20 | -14/+5004 | |
|\| | | | | | UltraPlus Hard IP and icetime Support | |||||
| * | Whitespace fixes | David Shah | 2017-11-28 | 3 | -9/+36 | |
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| * | Add uncommitted changes and tidy up some files | David Shah | 2017-11-28 | 3 | -2/+253 | |
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| * | Chipdb fix for hard IP | David Shah | 2017-11-26 | 1 | -4/+4 | |
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| * | Add note about glitch filter | David Shah | 2017-11-25 | 1 | -2/+12 | |
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| * | Add UltraPlus IP to chipdb | David Shah | 2017-11-24 | 2 | -3/+212 | |
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| * | Initial 5k support in icetime (no support for new cells yet) | David Shah | 2017-11-24 | 3 | -7/+28 | |
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| * | Preparations for 5k icetime | David Shah | 2017-11-24 | 3 | -2/+3627 | |
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| * | Documented I2C/SPI/LEDDA_IP | David Shah | 2017-11-24 | 2 | -2/+196 | |
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| * | All 5k IP traced | David Shah | 2017-11-24 | 4 | -3/+129 | |
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| * | Work on UltraPlus IP tracing | David Shah | 2017-11-24 | 3 | -0/+366 | |
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| * | Begin I2C/SPI IP reverse engineering | David Shah | 2017-11-23 | 5 | -0/+161 | |
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* | | Merge pull request #109 from daveshah1/up5k | Clifford Wolf | 2017-11-21 | 44 | -121/+24909 | |
|\| | | | | | Support for new UltraPlus features | |||||
| * | Tidy up 5k examples | David Shah | 2017-11-20 | 6 | -35/+18 | |
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| * | Fix whitespace and a couple of typos | David Shah | 2017-11-20 | 11 | -14/+14 | |
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| * | Add UltraPlus info to docs | David Shah | 2017-11-19 | 1 | -0/+7 | |
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| * | Merge branch 'master' into up5k | David Shah | 2017-11-19 | 1 | -0/+1 | |
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