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* icebox: Add PLL ICEGATE functionSylvain Munaut2023-02-011-0/+12
* icebox: cb121 does have a PLLgatecat2022-03-251-1/+0
* added I2C and SPI for u4k to databaseNils Albartus2020-12-041-0/+192
* icebox: Add support for the bit 1 of SHIFTREG_DIV_MODE on UP5kSylvain Munaut2020-06-031-1/+2
* up5k: Fix TOPADDSUB_CARRYSELECT_0 override where it swaps with osc trimmingDavid Shah2019-07-031-1/+2
* add RGB_DRV/LED_DRV_CUR for u4kSimon Schubert2019-06-101-0/+32
* icebox: Use cached re functionsMichael Buesch2019-06-081-63/+63
* icebox: Add helper functions to LRU cache regular expression resultsMichael Buesch2019-06-081-0/+26
* icebox: Use LRU cache for often called function tile_has_net()Michael Buesch2019-06-081-1/+3
* u4k: add SMCCLK cell locationSimon Schubert2019-02-221-0/+3
* iCE40 Ultra = iCE5LP = u4k portSimon Schubert2019-02-221-39/+291
* Merge pull request #178 from elmsfu/hlc/add_symbols_supportClifford Wolf2018-10-101-1/+23
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| * icebox: parse '.sym>' HLC to track signal namesElms2018-07-261-1/+23
* | Add support for cm36 and swg25tr lm4k packages.Andrew Wygle2018-08-281-16/+70
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* icebox: Allow selecting package in icebox_vlogDavid Shah2018-05-301-6/+9
* Correct internal global buffers for lm4kAndrew Wygle2018-05-131-2/+2
* Added missing ieren entries for lm4k.Andrew Wygle2018-05-131-24/+28
* Support lm4k in icebox_chipdb.py.Andrew Wygle2018-05-131-1/+1
* Completed first pass at icebox support for lm4k.Andrew Wygle2018-05-121-11/+14
* [WIP] Added colbuf and gbufin data for LM seriesAndrew Wygle2018-05-121-8/+25
* [WIP] Add partial icebox support for lm4k.Andrew Wygle2018-05-121-11/+242
* Add BG121 package variant and update docsDavid Shah2018-04-021-0/+190
* Add UltraPlus I³C IO to chipdbDavid Shah2018-02-091-1/+10
* Add RGB driver outputs to chipdbDavid Shah2018-02-091-0/+4
* Add 5k UWG30 ieren data to dbDavid Shah2018-01-161-1/+5
* Remove seperate 5k RAM DB and share with 8k insteadDavid Shah2018-01-161-11/+9
* Add pinout for 5k UWG30 packageDavid Shah2018-01-161-0/+23
* HFOSC trimming infoDavid Shah2018-01-161-1/+12
* New UltraPlus corner tracing algorithmDavid Shah2018-01-161-87/+86
* Misc routing tweaksDavid Shah2018-01-161-3/+7
* Figure out missing SPI config bits, and add to chipdbDavid Shah2018-01-161-0/+8
* Chipdb fix for hard IPDavid Shah2017-11-261-4/+4
* Add UltraPlus IP to chipdbDavid Shah2017-11-241-1/+208
* Begin I2C/SPI IP reverse engineeringDavid Shah2017-11-231-0/+8
* Fix whitespace and a couple of typosDavid Shah2017-11-201-3/+3
* Add all cf_bits and pullup strength notesDavid Shah2017-11-181-0/+12
* Remove non-existing routing resources (5k)David Shah2017-11-171-2/+3
* Add support for UltraPlus SPRAMDavid Shah2017-11-171-0/+243
* Add UltraPlus LED driver support and demoDavid Shah2017-11-171-10/+38
* UltraPlus Internal Oscillator supportDavid Shah2017-11-171-0/+22
* UltraPlus DSPs workingDavid Shah2017-11-171-0/+7
* Add new tile types and MAC16s to chipdbDavid Shah2017-11-171-3/+107
* Tidy up some of the icebox changesDavid Shah2017-11-171-44/+53
* Fix 5k corner routing, and reverse engineer SPRAMDavid Shah2017-11-171-20/+93
* Start UltraPlus DSP documentationDavid Shah2017-11-171-1/+1
* Trace DSP routingDavid Shah2017-11-171-24/+122
* Fix 5k gbin configurationDavid Shah2017-11-061-2/+2
* Fix 5k padin_glb_netwk bitsDavid Shah2017-11-051-8/+8
* Fix global network 1 padin bitDavid Shah2017-11-011-2/+2
* Work on 5k global buffer padsDavid Shah2017-11-011-8/+10