iCE40/icestorm - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Add 5k UWG30 ieren data to db	David Shah	2018-01-16	1	-1/+5
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*	Remove seperate 5k RAM DB and share with 8k instead	David Shah	2018-01-16	2	-2849/+9
\| \| \| \| \|	This should ensure that the 5k RAM routing entries are now complete, fixing #115
*	Add pinout for 5k UWG30 package	David Shah	2018-01-16	1	-0/+23
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*	HFOSC trimming info	David Shah	2018-01-16	1	-1/+12
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*	New UltraPlus corner tracing algorithm	David Shah	2018-01-16	1	-87/+86
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*	Misc routing tweaks	David Shah	2018-01-16	1	-3/+7
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*	Figure out missing SPI config bits, and add to chipdb	David Shah	2018-01-16	1	-0/+8
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*	Chipdb fix for hard IP	David Shah	2017-11-26	1	-4/+4
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*	Add UltraPlus IP to chipdb	David Shah	2017-11-24	2	-3/+212
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*	Begin I2C/SPI IP reverse engineering	David Shah	2017-11-23	1	-0/+8
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*	Fix whitespace and a couple of typos	David Shah	2017-11-20	1	-3/+3
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*	Add all cf_bits and pullup strength notes	David Shah	2017-11-18	1	-0/+12
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*	Add missing 5k BRAM bits	David Shah	2017-11-17	1	-7/+338
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*	Make 5k db as a default target	David Shah	2017-11-17	1	-1/+2
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*	Remove non-existing routing resources (5k)	David Shah	2017-11-17	1	-2/+3
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*	Add support for UltraPlus SPRAM	David Shah	2017-11-17	2	-1/+254
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*	Add UltraPlus LED driver support and demo	David Shah	2017-11-17	2	-11/+39
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*	UltraPlus Internal Oscillator support	David Shah	2017-11-17	2	-1/+34
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*	UltraPlus DSPs working	David Shah	2017-11-17	2	-1/+8
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*	Add new tile types and MAC16s to chipdb	David Shah	2017-11-17	2	-4/+138
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*	Tidy up some of the icebox changes	David Shah	2017-11-17	1	-44/+53
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*	Fix 5k corner routing, and reverse engineer SPRAM	David Shah	2017-11-17	1	-20/+93
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*	Start UltraPlus DSP documentation	David Shah	2017-11-17	2	-2/+3
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*	Trace DSP routing	David Shah	2017-11-17	4	-349/+6531
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*	Fix 5k gbin configuration	David Shah	2017-11-06	1	-2/+2
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*	Add more 5k RAM bits to db	David Shah	2017-11-05	1	-4/+86
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*	Fix 5k padin_glb_netwk bits	David Shah	2017-11-05	1	-8/+8
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*	Fix global network 1 padin bit	David Shah	2017-11-01	1	-2/+2
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*	Work on 5k global buffer pads	David Shah	2017-11-01	1	-8/+10
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*	Add missing up5k global buffer pads	David Shah	2017-10-31	1	-1/+4
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*	Working up5k PLL support	David Shah	2017-10-31	1	-63/+61
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*	Fix loading 5k asc files	David Shah	2017-10-31	1	-1/+1
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*	Add new 5k IO config bits to database	David Shah	2017-10-29	1	-3/+21
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*	Share glb_netwk data between 5k and 8k parts	David Shah	2017-10-29	2	-78/+101
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*	Fix global network data for up5k	David Shah	2017-10-25	1	-9/+9
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*	Fix colbuf db for up5k	David Shah	2017-10-25	1	-5/+7
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*	Add ColBufCtrl bits to database for 5k parts	David Shah	2017-10-25	1	-100/+72
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*	Add CarryInSet bit to DB	David Shah	2017-10-24	1	-0/+3
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*	Fix IeRen database for up5k	David Shah	2017-10-23	1	-97/+40
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*	Swap IEREN for pin 26 to get example working, other inputs still need fixing	David Shah	2017-10-21	2	-2/+73
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*	Fix RAM tile location in icebox.py	David Shah	2017-10-21	1	-1/+1
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*	Fix icebox to generate a working chipdb	David Shah	2017-10-21	1	-4/+4
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*	Bring chip data in icebox in line with icepack - and icecube	David Shah	2017-10-21	1	-50/+50
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*	Modify icebox.py so it generates a 5k chipdb	David Shah	2017-10-20	2	-30/+390
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*	Add (attempt at) IeRen mapping for 5k	David Shah	2017-10-20	1	-0/+98
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*	Add LP384 support to icebox_html	Darrell Harmon	2017-10-12	1	-3/+31
\| \| \| \|	Unsure about what IO tiles should be enabled, so all are enabled.
*	Merge pull request #97 from rlutz/hlc-fixes	Clifford Wolf	2017-09-14	6	-1/+2403
\|\ \| \| \| \|	Fixes to high-level configuration converters
\| *	icebox: Put .hlc converters under ISC license	Roland Lutz	2017-09-02	6	-1/+2403
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\| \| *	icebox: Fix parsing of IO block special wires	Roland Lutz	2017-08-27	1	-5/+5
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\| \| *	icebox: Fix parsing of PLL directive	Roland Lutz	2017-08-27	1	-1/+4
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