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* Merge pull request #147 from mithro/hlc-fixesClifford Wolf2018-06-011-4/+37
|\ | | | | Allow routing (bidir) entries to be looked up in either direction.
| * Allow routing (bidir) entries to be looked up in either direction.Tim 'mithro' Ansell2018-06-011-4/+37
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* | Merge pull request #146 from mithro/hlc-fixesClifford Wolf2018-05-311-5/+34
|\| | | | | Support both `abc/123` and `123` forms of specifying tracks.
| * Better error message when bit pattern is missing.Tim 'mithro' Ansell2018-05-301-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously; ``` self.apply_directive('buffer', src, dst) File "/usr/local/google/home/tansell/work/catx/vtr/env/conda/bin/icebox_hlc2asc", line 698, in apply_directive bits, = [entry[0] for entry in self.db if entry[1:] == fields] ValueError: not enough values to unpack (expected 1, got 0) ``` Now: ``` Parse error in line 2108: span12_y4_g14_0 -> span4_y4_g11_7 <-> span4_x7_g4_0 No bit pattern for ['buffer', 'sp12_h_r_11', 'sp4_h_r_7'] in LogicTile(1k, 7, 4) ```
| * Allow prefixes in multiple chained statements.Tim 'mithro' Ansell2018-05-301-2/+9
| | | | | | | | | | | | | | | | | | | | | | IE ``` lutff_1 { lutff_1/out -> local_g2_1 -> lutff_1/in_0 local_g2_2 -> lutff_1/in_3 local_g2_7 -> lutff_1/in_2 } ```
| * Support both `abc/123` and `123` forms of specifying tracks.Tim 'mithro' Ansell2018-05-301-0/+14
| | | | | | | | Kind of fixes #145.
* | icebox: Allow selecting package in icebox_vlogDavid Shah2018-05-302-8/+18
|/ | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Merge pull request #139 from awygle/lm_iceboxClifford Wolf2018-05-134-14/+284
|\ | | | | Icebox support for ice40 LM
| * Add chipdb-lm4k.txt to .gitignoreAndrew Wygle2018-05-131-0/+1
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| * Correct internal global buffers for lm4kAndrew Wygle2018-05-131-2/+2
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| * Added missing ieren entries for lm4k.Andrew Wygle2018-05-131-24/+28
| | | | | | | | Config SPI pins weren't present in ioctrl_lm4k.sh
| * Add lm4k chipdb to icebox Makefile.Andrew Wygle2018-05-131-2/+8
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| * Support lm4k in icebox_chipdb.py.Andrew Wygle2018-05-132-2/+10
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| * Completed first pass at icebox support for lm4k.Andrew Wygle2018-05-121-11/+14
| | | | | | | | Needs testing.
| * [WIP] Added colbuf and gbufin data for LM seriesAndrew Wygle2018-05-121-8/+25
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| * [WIP] Add partial icebox support for lm4k.Andrew Wygle2018-05-121-11/+242
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* | Extact reproducable chipdb-5k.txtClifford Wolf2018-05-131-2/+2
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add BG121 package variant and update docsDavid Shah2018-04-021-0/+190
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* Add UltraPlus I³C IO to chipdbDavid Shah2018-02-091-1/+10
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* Add RGB driver outputs to chipdbDavid Shah2018-02-091-0/+4
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* Add 5k UWG30 ieren data to dbDavid Shah2018-01-161-1/+5
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* Remove seperate 5k RAM DB and share with 8k insteadDavid Shah2018-01-162-2849/+9
| | | | | This should ensure that the 5k RAM routing entries are now complete, fixing #115
* Add pinout for 5k UWG30 packageDavid Shah2018-01-161-0/+23
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* HFOSC trimming infoDavid Shah2018-01-161-1/+12
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* New UltraPlus corner tracing algorithmDavid Shah2018-01-161-87/+86
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* Misc routing tweaksDavid Shah2018-01-161-3/+7
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* Figure out missing SPI config bits, and add to chipdbDavid Shah2018-01-161-0/+8
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* Chipdb fix for hard IPDavid Shah2017-11-261-4/+4
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* Add UltraPlus IP to chipdbDavid Shah2017-11-242-3/+212
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* Begin I2C/SPI IP reverse engineeringDavid Shah2017-11-231-0/+8
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* Fix whitespace and a couple of typosDavid Shah2017-11-201-3/+3
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* Add all cf_bits and pullup strength notesDavid Shah2017-11-181-0/+12
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* Add missing 5k BRAM bitsDavid Shah2017-11-171-7/+338
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* Make 5k db as a default targetDavid Shah2017-11-171-1/+2
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* Remove non-existing routing resources (5k)David Shah2017-11-171-2/+3
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* Add support for UltraPlus SPRAMDavid Shah2017-11-172-1/+254
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* Add UltraPlus LED driver support and demoDavid Shah2017-11-172-11/+39
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* UltraPlus Internal Oscillator supportDavid Shah2017-11-172-1/+34
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* UltraPlus DSPs workingDavid Shah2017-11-172-1/+8
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* Add new tile types and MAC16s to chipdbDavid Shah2017-11-172-4/+138
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* Tidy up some of the icebox changesDavid Shah2017-11-171-44/+53
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* Fix 5k corner routing, and reverse engineer SPRAMDavid Shah2017-11-171-20/+93
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* Start UltraPlus DSP documentationDavid Shah2017-11-172-2/+3
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* Trace DSP routingDavid Shah2017-11-174-349/+6531
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* Fix 5k gbin configurationDavid Shah2017-11-061-2/+2
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* Add more 5k RAM bits to dbDavid Shah2017-11-051-4/+86
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* Fix 5k padin_glb_netwk bitsDavid Shah2017-11-051-8/+8
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* Fix global network 1 padin bitDavid Shah2017-11-011-2/+2
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* Work on 5k global buffer padsDavid Shah2017-11-011-8/+10
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* Add missing up5k global buffer padsDavid Shah2017-10-311-1/+4
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