| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Fix coding style in icepll.cc | Clifford Wolf | 2017-07-04 | 1 | -8/+4 |
| * | Update PLL DIVF range to be [0,127] | C-Elegans | 2017-06-24 | 1 | -1/+10 |
| * | Remove trailing comma in icepll module output. | Josh Headapohl | 2017-03-13 | 1 | -1/+1 |
| * | icepll: changes according to cliffordwolf/icestorm#67: | Matthias | 2017-02-04 | 1 | -3/+1 |
| * | icepll: added -m option to choose between saving Verilog header or module | Matthias | 2017-02-02 | 1 | -47/+91 |
| * | icepll: added -f option to export configuration as Verilog module | Matthias | 2017-02-01 | 1 | -2/+58 |
| * | icepll: added -q option to suppress output to stdout | Matthias | 2017-02-01 | 1 | -16/+26 |
| * | Fixed icepll divf range | Clifford Wolf | 2016-12-17 | 1 | -1/+1 |
| * | Added FILTER_RANGE support to icepll | Clifford Wolf | 2016-05-15 | 1 | -0/+11 |
| * | fix a few spelling errors | Ruben Undheim | 2016-02-27 | 1 | -2/+2 |
| * | Added "icepll" PLL parameters calculator | Clifford Wolf | 2016-01-04 | 1 | -0/+174 |
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index : iCE40/icestorm | |
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