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author | Keith Rothman <537074+litghost@users.noreply.github.com> | 2021-04-01 15:12:53 -0700 |
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committer | Keith Rothman <537074+litghost@users.noreply.github.com> | 2021-04-06 10:42:05 -0700 |
commit | 90aa1d3b7e822d60aa2437e6939651e55f02ffc4 (patch) | |
tree | 829885e5efeceb484ebe5972eacc425f230cdabe /3rdparty/pybind11/.appveyor.yml | |
parent | 0d41fff3a70a298036aa6fdc103093631998a2bd (diff) | |
download | nextpnr-90aa1d3b7e822d60aa2437e6939651e55f02ffc4.tar.gz nextpnr-90aa1d3b7e822d60aa2437e6939651e55f02ffc4.tar.bz2 nextpnr-90aa1d3b7e822d60aa2437e6939651e55f02ffc4.zip |
[interchange] Disallow site edges during general routing.
This prevents the general router from routing through sites, which is
not legal in FPGA interchange.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Diffstat (limited to '3rdparty/pybind11/.appveyor.yml')
0 files changed, 0 insertions, 0 deletions