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authorClifford Wolf <clifford@clifford.at>2018-07-21 21:40:06 +0200
committerClifford Wolf <clifford@clifford.at>2018-07-21 21:40:06 +0200
commit30e2f0e1e8cfdb24abe6c3a8013691497c706975 (patch)
treeb6f1ed038065063dbfbca1cbd88d2f7cf4f7e8a1
parentf438fc615b829170679971110b5d1bb57fba6a86 (diff)
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Add Loc constructors
Signed-off-by: Clifford Wolf <clifford@clifford.at>
-rw-r--r--common/nextpnr.h3
-rw-r--r--generic/arch.cc15
-rw-r--r--generic/arch.h2
-rw-r--r--ice40/arch.cc7
4 files changed, 10 insertions, 17 deletions
diff --git a/common/nextpnr.h b/common/nextpnr.h
index 40fd3d13..c8915c19 100644
--- a/common/nextpnr.h
+++ b/common/nextpnr.h
@@ -164,6 +164,9 @@ struct Loc
{
int x = -1, y = -1, z = -1;
+ Loc() {}
+ Loc(int x, int y, int z) : x(x), y(y), z(z) {}
+
bool operator==(const Loc &other) const { return (x == other.x) && (y == other.y) && (z == other.z); }
bool operator!=(const Loc &other) const { return (x != other.x) || (y != other.y) || (z == other.z); }
};
diff --git a/generic/arch.cc b/generic/arch.cc
index b7ec847e..447aaa35 100644
--- a/generic/arch.cc
+++ b/generic/arch.cc
@@ -62,28 +62,23 @@ void Arch::addAlias(IdString name, IdString srcWire, IdString dstWire, DelayInfo
pip_ids.push_back(name);
}
-void Arch::addBel(IdString name, IdString type, int x, int y, int z, bool gb)
+void Arch::addBel(IdString name, IdString type, Loc loc, bool gb)
{
- Loc loc;
- loc.x = x;
- loc.y = y;
- loc.z = z;
-
NPNR_ASSERT(bels.count(name) == 0);
NPNR_ASSERT(bel_by_loc.count(loc) == 0);
BelInfo &bi = bels[name];
bi.name = name;
bi.type = type;
- bi.x = x;
- bi.y = y;
- bi.z = z;
+ bi.x = loc.x;
+ bi.y = loc.y;
+ bi.z = loc.z;
bi.gb = gb;
bel_ids.push_back(name);
bel_ids_by_type[type].push_back(name);
bel_by_loc[loc] = name;
- bels_by_tile[x][y].push_back(name);
+ bels_by_tile[loc.x][loc.y].push_back(name);
}
void Arch::addBelInput(IdString bel, IdString name, IdString wire)
diff --git a/generic/arch.h b/generic/arch.h
index e1516569..f4ca4383 100644
--- a/generic/arch.h
+++ b/generic/arch.h
@@ -97,7 +97,7 @@ struct Arch : BaseCtx
void addPip(IdString name, IdString srcWire, IdString dstWire, DelayInfo delay);
void addAlias(IdString name, IdString srcWire, IdString dstWire, DelayInfo delay);
- void addBel(IdString name, IdString type, int x, int y, int z, bool gb);
+ void addBel(IdString name, IdString type, Loc loc, bool gb);
void addBelInput(IdString bel, IdString name, IdString wire);
void addBelOutput(IdString bel, IdString name, IdString wire);
void addBelInout(IdString bel, IdString name, IdString wire);
diff --git a/ice40/arch.cc b/ice40/arch.cc
index e9a7d2b6..bbed4000 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -279,12 +279,7 @@ BelRange Arch::getBelsByTile(int x, int y) const
// In iCE40 chipdb bels at the same tile are consecutive and dense z ordinates are used
BelRange br;
- Loc loc;
- loc.x = x;
- loc.y = y;
- loc.z = 0;
-
- br.b.cursor = Arch::getBelByLocation(loc).index;
+ br.b.cursor = Arch::getBelByLocation(Loc(x, y, 0)).index;
br.e.cursor = br.b.cursor;
if (br.e.cursor != -1) {