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author | David Shah <dave@ds0.me> | 2019-03-31 17:54:52 +0100 |
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committer | David Shah <dave@ds0.me> | 2019-04-02 15:30:01 +0100 |
commit | 50fd8aa01fde3426ff74fcf9b0126a24f279efca (patch) | |
tree | ddb2c33d65c977b656406d4a90827b959672bf83 | |
parent | fd3ad755988ee185427479595a8c368c3f1b9519 (diff) | |
download | nextpnr-50fd8aa01fde3426ff74fcf9b0126a24f279efca.tar.gz nextpnr-50fd8aa01fde3426ff74fcf9b0126a24f279efca.tar.bz2 nextpnr-50fd8aa01fde3426ff74fcf9b0126a24f279efca.zip |
generic: Place a single SLICE
Signed-off-by: David Shah <dave@ds0.me>
-rw-r--r-- | common/pybindings.cc | 35 | ||||
-rw-r--r-- | generic/arch_pybindings.cc | 10 | ||||
-rw-r--r-- | generic/examples/simple.py | 3 | ||||
-rw-r--r-- | generic/examples/simple.v | 15 |
4 files changed, 29 insertions, 34 deletions
diff --git a/common/pybindings.cc b/common/pybindings.cc index 547d9b62..bf5382eb 100644 --- a/common/pybindings.cc +++ b/common/pybindings.cc @@ -81,34 +81,6 @@ template <> struct string_converter<PortRef &> } // namespace PythonConversion -struct loc_from_tuple -{ - loc_from_tuple() { converter::registry::push_back(&convertible, &construct, boost::python::type_id<Loc>()); } - - static void *convertible(PyObject *obj_ptr) - { - if (!PyTuple_Check(obj_ptr)) - return 0; - return obj_ptr; - } - - static void construct(PyObject *obj_ptr, converter::rvalue_from_python_stage1_data *data) - { - int val[3]; - for (int i = 0; i < 3; i++) { - PyObject *pyo = PyTuple_GetItem(obj_ptr, i); - if (!pyo) - throw_error_already_set(); - NPNR_ASSERT(PyLong_Check(pyo)); - val[i] = int(PyLong_AsLong(pyo)); - } - - void *storage = ((converter::rvalue_from_python_storage<Loc> *)data)->storage.bytes; - new (storage) Loc(val[0], val[1], val[2]); - data->convertible = storage; - } -}; - BOOST_PYTHON_MODULE(MODULE_NAME) { register_exception_translator<assertion_failure>(&translate_assertfail); @@ -136,8 +108,11 @@ BOOST_PYTHON_MODULE(MODULE_NAME) class_<BaseCtx, BaseCtx *, boost::noncopyable>("BaseCtx", no_init); - auto loc_cls = - class_<Loc>("Loc").def_readwrite("x", &Loc::x).def_readwrite("y", &Loc::y).def_readwrite("z", &Loc::z); + auto loc_cls = class_<Loc>("Loc") + .def(init<int, int, int>()) + .def_readwrite("x", &Loc::x) + .def_readwrite("y", &Loc::y) + .def_readwrite("z", &Loc::z); auto ci_cls = class_<ContextualWrapper<CellInfo &>>("CellInfo", no_init); readwrite_wrapper<CellInfo &, decltype(&CellInfo::name), &CellInfo::name, conv_to_str<IdString>, diff --git a/generic/arch_pybindings.cc b/generic/arch_pybindings.cc index 407dc4d4..014b7758 100644 --- a/generic/arch_pybindings.cc +++ b/generic/arch_pybindings.cc @@ -174,12 +174,14 @@ void arch_wrap_python() pass_through<DecalXY>>::def_wrap(ctx_cls, "setGroupDecal", (arg("group"), "decalxy")); fn_wrapper_3a_v<Context, decltype(&Context::setWireAttr), &Context::setWireAttr, conv_from_str<DecalId>, - conv_from_str<IdString>, pass_through<std::string>>::def_wrap(ctx_cls, "setWireAttr", (arg("wire"), "key", "value")); + conv_from_str<IdString>, pass_through<std::string>>::def_wrap(ctx_cls, "setWireAttr", + (arg("wire"), "key", "value")); fn_wrapper_3a_v<Context, decltype(&Context::setBelAttr), &Context::setBelAttr, conv_from_str<DecalId>, - conv_from_str<IdString>, pass_through<std::string>>::def_wrap(ctx_cls, "setBelAttr", (arg("bel"), "key", "value")); + conv_from_str<IdString>, pass_through<std::string>>::def_wrap(ctx_cls, "setBelAttr", + (arg("bel"), "key", "value")); fn_wrapper_3a_v<Context, decltype(&Context::setPipAttr), &Context::setPipAttr, conv_from_str<DecalId>, - conv_from_str<IdString>, pass_through<std::string>>::def_wrap(ctx_cls, "setPipAttr", (arg("pip"), "key", "value")); - + conv_from_str<IdString>, pass_through<std::string>>::def_wrap(ctx_cls, "setPipAttr", + (arg("pip"), "key", "value")); WRAP_MAP_UPTR(CellMap, "IdCellMap"); WRAP_MAP_UPTR(NetMap, "IdNetMap"); diff --git a/generic/examples/simple.py b/generic/examples/simple.py new file mode 100644 index 00000000..da41dc5b --- /dev/null +++ b/generic/examples/simple.py @@ -0,0 +1,3 @@ +ctx.addBel(name="SLICE_X1Y1", type="SLICE_LUT4", loc=Loc(1, 1, 0), gb=False) +ctx.addBel(name="IO0_I", type="$nextpnr_ibuf", loc=Loc(0, 0, 0), gb=False) +ctx.addBel(name="IO1_O", type="$nextpnr_obuf", loc=Loc(1, 0, 0), gb=False)
\ No newline at end of file diff --git a/generic/examples/simple.v b/generic/examples/simple.v new file mode 100644 index 00000000..6d337101 --- /dev/null +++ b/generic/examples/simple.v @@ -0,0 +1,15 @@ +(* blackbox *) +module SLICE_LUT4( + input I0, I1, I2, I3, + input CLK, + output Q +); +parameter INIT = 16'h0000; +parameter FF_USED = 1'b0; +endmodule + +module top(input a, output q); + +SLICE_LUT4 sl_i(.I0(a), .Q(q)); + +endmodule
\ No newline at end of file |