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authorWilliam D. Jones <thor0505@comcast.net>2020-11-26 19:27:09 -0500
committergatecat <gatecat@ds0.me>2021-02-12 10:36:59 +0000
commit5838662b2f8a06aef52eac8218175f59547b5f09 (patch)
tree2de409f814b822173f1dd7ed6c017a757fd05dca
parentda6204442fb2635ec82621c00cdf4f7e3dfa3499 (diff)
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machxo2: Make sure REGSET FF parameter is set in FACADE_SLICE. Init blinky ctr to 0 for miter circuit.
-rw-r--r--machxo2/cells.cc3
-rw-r--r--machxo2/examples/blinky.v3
2 files changed, 5 insertions, 1 deletions
diff --git a/machxo2/cells.cc b/machxo2/cells.cc
index 9a682a72..9a522b1a 100644
--- a/machxo2/cells.cc
+++ b/machxo2/cells.cc
@@ -162,6 +162,9 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_l
// FACADE_SLICE DI input instead of the FACADE_SLICE M input.
lc->params[ctx->id("REG0_SD")] = std::string("0");
+ // FIXME: This will have to change once we support FFs with reset value of 1.
+ lc->params[ctx->id("REG0_REGSET")] = std::string("RESET");
+
replace_port(dff, ctx->id("CLK"), lc, ctx->id("CLK"));
replace_port(dff, ctx->id("DI"), lc, ctx->id("DI0"));
replace_port(dff, ctx->id("LSR"), lc, ctx->id("LSR"));
diff --git a/machxo2/examples/blinky.v b/machxo2/examples/blinky.v
index c7cde26d..2137ad58 100644
--- a/machxo2/examples/blinky.v
+++ b/machxo2/examples/blinky.v
@@ -1,6 +1,7 @@
module top(input clk, rst, output [7:0] leds);
-reg [7:0] ctr;
+// TODO: Test miter circuit without reset value.
+reg [7:0] ctr = 8'h00;
always @(posedge clk)
if (rst)
ctr <= 8'h00;