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| author | Clifford Wolf <clifford@clifford.at> | 2018-06-07 12:26:02 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2018-06-07 12:26:02 +0200 |
| commit | 8bfeaeacedeb09133b8fb157c876fb90f41f5676 (patch) | |
| tree | 9ab097de7a22e25f09288595003c2ce2047b3124 | |
| parent | 9eeecf0e62d44c59f5f0a5243a47793369dd71c0 (diff) | |
| download | nextpnr-8bfeaeacedeb09133b8fb157c876fb90f41f5676.tar.gz nextpnr-8bfeaeacedeb09133b8fb157c876fb90f41f5676.tar.bz2 nextpnr-8bfeaeacedeb09133b8fb157c876fb90f41f5676.zip | |
Add ICE40_HX1K_ONLY config macro
Signed-off-by: Clifford Wolf <clifford@clifford.at>
| -rw-r--r-- | ice40/chip.cc | 7 | ||||
| -rw-r--r-- | ice40/main.cc | 44 |
2 files changed, 43 insertions, 8 deletions
diff --git a/ice40/chip.cc b/ice40/chip.cc index d1226b3a..d3388bc9 100644 --- a/ice40/chip.cc +++ b/ice40/chip.cc @@ -277,6 +277,12 @@ PortPin PortPinFromId(IdString id) Chip::Chip(ChipArgs args) { +#ifdef ICE40_HX1K_ONLY + if (args.type == ChipArgs::HX1K) { + chip_info = chip_info_1k; + return; + } +#else if (args.type == ChipArgs::LP384) { chip_info = chip_info_384; return; @@ -293,6 +299,7 @@ Chip::Chip(ChipArgs args) fprintf(stderr, "Unsupported chip type\n"); exit(EXIT_FAILURE); } +#endif abort(); } diff --git a/ice40/main.cc b/ice40/main.cc index da39c1e5..ae5c59b2 100644 --- a/ice40/main.cc +++ b/ice40/main.cc @@ -86,10 +86,11 @@ int main(int argc, char *argv[]) if (vm.count("help") || argc == 1) { + help: std::cout << basename(argv[0]) << " -- Next Generation Place and Route (git sha1 " GIT_COMMIT_HASH_STR ")\n"; std::cout << "\n"; std::cout << options << "\n"; - return 1; + return argc != 1; } if (vm.count("version")) @@ -101,25 +102,52 @@ int main(int argc, char *argv[]) } ChipArgs chipArgs; - chipArgs.type = ChipArgs::HX1K; - if (vm.count("lp384")) + if (vm.count("lp384")) { + if (chipArgs.type != ChipArgs::NONE) + goto help; chipArgs.type = ChipArgs::LP384; + } - if (vm.count("lp1k")) + if (vm.count("lp1k")) { + if (chipArgs.type != ChipArgs::NONE) + goto help; chipArgs.type = ChipArgs::LP1K; + } - if (vm.count("lp8k")) + if (vm.count("lp8k")) { + if (chipArgs.type != ChipArgs::NONE) + goto help; chipArgs.type = ChipArgs::LP8K; + } - if (vm.count("hx1k")) + if (vm.count("hx1k")) { + if (chipArgs.type != ChipArgs::NONE) + goto help; chipArgs.type = ChipArgs::HX1K; + } - if (vm.count("hx8k")) + if (vm.count("hx8k")) { + if (chipArgs.type != ChipArgs::NONE) + goto help; chipArgs.type = ChipArgs::HX8K; + } - if (vm.count("up5k")) + if (vm.count("up5k")) { + if (chipArgs.type != ChipArgs::NONE) + goto help; chipArgs.type = ChipArgs::UP5K; + } + + if (chipArgs.type == ChipArgs::NONE) + chipArgs.type = ChipArgs::HX1K; + +#ifdef ICE40_HX1K_ONLY + if (chipArgs.type != ChipArgs::HX1K) { + std::cout << "This version of nextpnr-ice40 is built with HX1K-support only.\n"; + return 1; + } +#endif Design design(chipArgs); init_python(argv[0]); |