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author | gatecat <gatecat@ds0.me> | 2021-12-12 18:49:37 +0000 |
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committer | gatecat <gatecat@ds0.me> | 2021-12-12 18:49:37 +0000 |
commit | a933f82845e489af7f5e209d2d43ff79b4c521ca (patch) | |
tree | 08be8ba6ba457d9d75cfa2eeb365d03c6989f54c | |
parent | 0dafcc44ffcbe747babdadbb33d4dc140b5ea87c (diff) | |
download | nextpnr-a933f82845e489af7f5e209d2d43ff79b4c521ca.tar.gz nextpnr-a933f82845e489af7f5e209d2d43ff79b4c521ca.tar.bz2 nextpnr-a933f82845e489af7f5e209d2d43ff79b4c521ca.zip |
clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
-rw-r--r-- | ecp5/arch.h | 10 | ||||
-rw-r--r-- | gowin/pack.cc | 6 |
2 files changed, 9 insertions, 7 deletions
diff --git a/ecp5/arch.h b/ecp5/arch.h index 585ae01d..a5706379 100644 --- a/ecp5/arch.h +++ b/ecp5/arch.h @@ -450,9 +450,9 @@ struct Arch : BaseArch<ArchRanges> // faster replacements for base_pip2net, base_wire2net // indexed by get_pip_vecidx() - std::vector<NetInfo*> pip2net; + std::vector<NetInfo *> pip2net; // indexed by get_wire_vecidx() - std::vector<NetInfo*> wire2net; + std::vector<NetInfo *> wire2net; std::vector<int> wire_fanout; // We record the index=0 offset into pip2net for each tile, allowing us to // calculate any PipId's offset from pip.index and pip.location @@ -624,7 +624,8 @@ struct Arch : BaseArch<ArchRanges> uint32_t getWireChecksum(WireId wire) const override { return wire.index; } - uint32_t get_wire_vecidx(const WireId & e) const { + uint32_t get_wire_vecidx(const WireId &e) const + { uint32_t tile = e.location.y * chip_info->width + e.location.x; int32_t base = wire_tile_vecidx.at(tile); NPNR_ASSERT(base != -1); @@ -702,7 +703,8 @@ struct Arch : BaseArch<ArchRanges> uint32_t getPipChecksum(PipId pip) const override { return pip.index; } - uint32_t get_pip_vecidx(const PipId & e) const { + uint32_t get_pip_vecidx(const PipId &e) const + { uint32_t tile = e.location.y * chip_info->width + e.location.x; int32_t base = pip_tile_vecidx.at(tile); NPNR_ASSERT(base != -1); diff --git a/gowin/pack.cc b/gowin/pack.cc index 4c6e28ca..cb63f1c9 100644 --- a/gowin/pack.cc +++ b/gowin/pack.cc @@ -89,9 +89,9 @@ static void pack_alus(Context *ctx) } std::unique_ptr<CellInfo> packed_head = create_generic_cell(ctx, id_SLICE, ci->name.str(ctx) + "_HEAD_ALULC"); - // Head is always SLICE0 - packed_head->constr_z = 0; - packed_head->constr_abs_z = true; + // Head is always SLICE0 + packed_head->constr_z = 0; + packed_head->constr_abs_z = true; if (ctx->verbose) { log_info("packed ALU head into %s. CIN net is %s\n", ctx->nameOf(packed_head.get()), ctx->nameOf(cin_netId)); |