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| author | gatecat <gatecat@ds0.me> | 2021-03-22 18:31:48 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-03-22 18:31:48 +0000 |
| commit | e8d36bf5bdda84503d5c796b933b1c986a277bf5 (patch) | |
| tree | 18934e6784c4bb0b4a083389e86c78f45c8a2cb1 | |
| parent | f6ae068cb205527d63d93e5b3581b85a22f90f34 (diff) | |
| parent | 4cd74bba2c010e4d714ec72fe11128069ea0495a (diff) | |
| download | nextpnr-e8d36bf5bdda84503d5c796b933b1c986a277bf5.tar.gz nextpnr-e8d36bf5bdda84503d5c796b933b1c986a277bf5.tar.bz2 nextpnr-e8d36bf5bdda84503d5c796b933b1c986a277bf5.zip | |
Merge pull request #634 from litghost/add_get_bel_pin_type
Add getBelPinType to Python interface.
| -rw-r--r-- | common/arch_pybindings_shared.h | 2 | ||||
| -rw-r--r-- | fpga_interchange/examples/devices/xc7a35t/test_data.yaml | 4 | ||||
| -rw-r--r-- | python/check_arch_api.py | 4 |
3 files changed, 10 insertions, 0 deletions
diff --git a/common/arch_pybindings_shared.h b/common/arch_pybindings_shared.h index 81469df3..ef355a54 100644 --- a/common/arch_pybindings_shared.h +++ b/common/arch_pybindings_shared.h @@ -60,6 +60,8 @@ fn_wrapper_0a<Context, decltype(&Context::getBels), &Context::getBels, wrap_cont fn_wrapper_2a<Context, decltype(&Context::getBelPinWire), &Context::getBelPinWire, conv_to_str<WireId>, conv_from_str<BelId>, conv_from_str<IdString>>::def_wrap(ctx_cls, "getBelPinWire"); +fn_wrapper_2a<Context, decltype(&Context::getBelPinType), &Context::getBelPinType, pass_through<PortType>, + conv_from_str<BelId>, conv_from_str<IdString>>::def_wrap(ctx_cls, "getBelPinType"); fn_wrapper_1a<Context, decltype(&Context::getWireBelPins), &Context::getWireBelPins, wrap_context<BelPinRange>, conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireBelPins"); diff --git a/fpga_interchange/examples/devices/xc7a35t/test_data.yaml b/fpga_interchange/examples/devices/xc7a35t/test_data.yaml index 268d180a..88c6feda 100644 --- a/fpga_interchange/examples/devices/xc7a35t/test_data.yaml +++ b/fpga_interchange/examples/devices/xc7a35t/test_data.yaml @@ -34,3 +34,7 @@ bel_pin_test: - bel: $CONSTANTS_X0Y0.$CONSTANTS/VCC pin: P wire: $CONSTANTS_X0Y0.$CONSTANTS/$VCC_SOURCE + - bel: SLICE_X1Y19.SLICEL/SRUSEDGND + pin: "0" + wire: SLICE_X1Y19.SLICEL/SRUSEDGND_HARD0 + type: PORT_OUT diff --git a/python/check_arch_api.py b/python/check_arch_api.py index 166f1fd3..4c21d223 100644 --- a/python/check_arch_api.py +++ b/python/check_arch_api.py @@ -78,6 +78,10 @@ def check_arch_api(ctx): wire_name = ctx.getBelPinWire(bel_pin_test['bel'], bel_pin_test['pin']) assert bel_pin_test['wire'] == wire_name, (bel_pin_test['wire'], wire_name) + if 'type' in bel_pin_test: + pin_type = ctx.getBelPinType(bel_pin_test['bel'], bel_pin_test['pin']) + assert bel_pin_test['type'] == pin_type.name, (bel_pin_test['type'], pin_type) + bel_pins_tested += 1 print('Tested {} pips and {} bel pins'.format(pips_tested, bel_pins_tested)) |