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authorYRabbit <rabbit@yrabbit.cyou>2022-06-09 08:20:29 +1000
committerYRabbit <rabbit@yrabbit.cyou>2022-06-09 08:20:29 +1000
commitbd0af4052c434b1cf3ed8522360b5acc78bd17a2 (patch)
treeb15a4cfd64fa6412c091ba579dee250fb8cae639 /COPYING
parent2da7caf6573d857e72388003982043d743bc9438 (diff)
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gowin: Use local aliases
In the Gowin chips, the tiles are connected to each other by a one-hop wire, among others. There are 4 one-hop wires, of which 2 are shared between north/south and east/west, have three names: e.g. SN10 and N110 and S110. But only one of them, the first, occurs as a sink for PIP, that is, you can not get a route that would pass through the S110 for example. This commit corrects the names to SN?0 and EW?0 at the wire creation stage to avoid dead wires. In addition, the SN?0 and EW?0 are among the few sinks for global clock wires and now there is the possibility of a more optimal clock routing. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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