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authorYRabbit <rabbit@yrabbit.cyou>2023-01-30 12:49:57 +1000
committerYRabbit <rabbit@yrabbit.cyou>2023-01-30 12:49:57 +1000
commit6a1212a1e14d19bda114317e9f544b534cbf2841 (patch)
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parentf80b871dd54b5215480a8eb00313a7ac16d9e883 (diff)
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gowin: Add PLL support for the GW1NR-9 chip
And also unified the fixing of PLL to bels: the point is that PLL being at a certain location has the possibility to use a direct implicit wire to the clock source, but once we decide to use this direct wire, the PLL can no longer be moved. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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